Messages in this thread Patch in this message | | | From | Matthias Schiffer <> | Subject | [PATCH net-next 2/4] net: dsa: mv88e6xxx: account for PHY base address offset in dual chip mode | Date | Mon, 30 Mar 2020 15:53:43 +0200 |
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In dual chip mode (6250 family), not only global and port registers are shifted by sw_addr, but also the PHY addresses. Account for this in the IRQ mapping.
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> --- drivers/net/dsa/mv88e6xxx/chip.h | 1 + drivers/net/dsa/mv88e6xxx/global2.c | 2 +- drivers/net/dsa/mv88e6xxx/smi.c | 4 ++++ 3 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/net/dsa/mv88e6xxx/chip.h b/drivers/net/dsa/mv88e6xxx/chip.h index e5430cf2ad71..88c148a62366 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.h +++ b/drivers/net/dsa/mv88e6xxx/chip.h @@ -257,6 +257,7 @@ struct mv88e6xxx_chip { const struct mv88e6xxx_bus_ops *smi_ops; struct mii_bus *bus; int sw_addr; + unsigned int phy_base_addr; /* Handles automatic disabling and re-enabling of the PHY * polling unit. diff --git a/drivers/net/dsa/mv88e6xxx/global2.c b/drivers/net/dsa/mv88e6xxx/global2.c index 8fd483020c5b..3c3dfaf16882 100644 --- a/drivers/net/dsa/mv88e6xxx/global2.c +++ b/drivers/net/dsa/mv88e6xxx/global2.c @@ -1156,7 +1156,7 @@ int mv88e6xxx_g2_irq_mdio_setup(struct mv88e6xxx_chip *chip, err = irq; goto out; } - bus->irq[chip->info->phy_base_addr + phy] = irq; + bus->irq[chip->phy_base_addr + phy] = irq; } return 0; out: diff --git a/drivers/net/dsa/mv88e6xxx/smi.c b/drivers/net/dsa/mv88e6xxx/smi.c index 282fe08db050..a62d7b8702d5 100644 --- a/drivers/net/dsa/mv88e6xxx/smi.c +++ b/drivers/net/dsa/mv88e6xxx/smi.c @@ -175,5 +175,9 @@ int mv88e6xxx_smi_init(struct mv88e6xxx_chip *chip, chip->bus = bus; chip->sw_addr = sw_addr; + chip->phy_base_addr = chip->info->phy_base_addr; + if (chip->info->dual_chip) + chip->phy_base_addr += sw_addr; + return 0; } -- 2.17.1
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