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    SubjectRe: [PATCH v2 05/17] clk: mmp2: Stop pretending PLL outputs are constant
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    Quoting Lubomir Rintel (2020-03-09 12:42:42)
    > The hardcoded values for PLL1 and PLL2 are wrong. PLL1 is slightly
    > off -- it defaults to 797.33 MHz, not 800 MHz. PLL2 is disabled by default,
    > but also configurable.
    >
    > Tested on a MMP2-based OLPC XO-1.75 laptop, with PLL1=797.33 and various
    > values of PLL2 set via set-pll2-520mhz, set-pll2-910mhz and
    > set-pll2-988mhz Open Firmware words.
    >
    > Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
    > ---

    Applied to clk-next

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