Messages in this thread | | | Date | Thu, 19 Mar 2020 15:41:15 +0530 | From | Sibi Sankar <> | Subject | Re: [RFC v3 00/10] DDR/L3 Scaling support on SDM845 and SC7180 SoCs |
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On 2020-03-19 15:12, Rajendra Nayak wrote: > On 3/18/2020 9:12 AM, Viresh Kumar wrote: >> On 18-03-20, 02:13, Sibi Sankar wrote: >>> On 2020-01-28 01:33, Sibi Sankar wrote: >>>> This RFC series aims to extend cpu based scaling support to L3/DDR >>>> on >>>> SDM845 and SC7180 SoCs. >>>> >>> >>> Hey Viresh/Saravana, >>> >>> Ping! Can you take a stab at reviewing >>> the series, it has been on the list for >>> a while now. >> >> I believe this depends on Saravana's series on which I have raised >> some doubts few weeks back ? I am still waiting for them to get >> clarified by him.
Viresh, Saravana's example does show a device with multiple opp tables but doesn't need multiple opp table support to land though (since it works fine with the current implementation). I am more interested in understanding your/ Stephen's/Saravana's stance on adding multiple opp-table support. Personally I feel its inevitable, since multiple qc drivers using interconnect opp-tables, routinely need vote on multiple paths in a non-trivial manner.
> > Could you please post a link to the discussion that you are referring > to here? > I looked at a few links posted in the cover letter as dependencies and > it seems > like the discussions are pending for *months* and not weeks but I > might have looked > at the wrong ones.
https://lore.kernel.org/lkml/20200114103448.odnvqawnqb3twst5@vireshk-i7/
Rajendra, Viresh is referring to ^^ one
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