Messages in this thread | | | Date | Sun, 09 Feb 2020 23:33:11 +0530 | From | Sibi Sankar <> | Subject | Re: [PATCH v2 6/6] arm64: dts: sdm845: Redefine interconnect provider DT nodes |
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On 2020-02-04 23:48, Evan Green wrote: > On Thu, Jan 9, 2020 at 8:33 PM David Dai <daidavid1@codeaurora.org> > wrote: >> >> Add the DT nodes for each of the Network-On-Chip interconnect >> buses found on SDM845 based platform and redefine the rsc_hlos >> child node as a bcm-voter device to better represent the hardware. >> >> Signed-off-by: David Dai <daidavid1@codeaurora.org> >> --- >> arch/arm64/boot/dts/qcom/sdm845.dtsi | 61 >> ++++++++++++++++++++++++++++++++++-- >> 1 file changed, 58 insertions(+), 3 deletions(-) >> >> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi >> b/arch/arm64/boot/dts/qcom/sdm845.dtsi >> index ddb1f23..7c617a9 100644 >> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi >> @@ -1364,6 +1364,55 @@ >> interrupts = <GIC_SPI 582 >> IRQ_TYPE_LEVEL_HIGH>; >> }; >> >> + mem_noc: interconnect@1380000 { >> + compatible = "qcom,sdm845-mem-noc"; >> + reg = <0 0x01380000 0 0x27200>; >> + #interconnect-cells = <1>; >> + qcom,bcm-voters = <&apps_bcm_voter>; >> + }; >> + >> + dc_noc: interconnect@14e0000 { >> + compatible = "qcom,sdm845-dc-noc"; >> + reg = <0 0x014e0000 0 0x400>; >> + #interconnect-cells = <1>; >> + qcom,bcm-voters = <&apps_bcm_voter>; >> + }; >> + >> + config_noc: interconnect@1500000 { >> + compatible = "qcom,sdm845-config-noc"; >> + reg = <0 0x01500000 0 0x5080>; >> + #interconnect-cells = <1>; >> + qcom,bcm-voters = <&apps_bcm_voter>; >> + }; >> + >> + system_noc: interconnect@1620000 { >> + compatible = "qcom,sdm845-system-noc"; >> + reg = <0 0x01620000 0 0x18080>; >> + #interconnect-cells = <1>; >> + qcom,bcm-voters = <&apps_bcm_voter>; >> + }; >> + >> + aggre1_noc: interconnect@16e0000 { >> + compatible = "qcom,sdm845-aggre1-noc"; >> + reg = <0 0x016e0000 0 0xd080>; >> + #interconnect-cells = <1>; >> + qcom,bcm-voters = <&apps_bcm_voter>; >> + }; >> + >> + aggre2_noc: interconnect@1700000 { >> + compatible = "qcom,sdm845-aggre2-noc"; >> + reg = <0 0x01700000 0 0x3b100>; >> + #interconnect-cells = <1>; >> + qcom,bcm-voters = <&apps_bcm_voter>; >> + }; >> + >> + mmss_noc: interconnect@1740000 { >> + compatible = "qcom,sdm845-mmss-noc"; >> + reg = <0 0x01740000 0 0x1c1000>; >> + #interconnect-cells = <1>; >> + qcom,bcm-voters = <&apps_bcm_voter>; >> + }; >> + >> ufs_mem_hc: ufshc@1d84000 { >> compatible = "qcom,sdm845-ufshc", >> "qcom,ufshc", >> "jedec,ufs-2.0"; >> @@ -3100,6 +3149,13 @@ >> #mbox-cells = <1>; >> }; >> >> + gladiator_noc: interconnect@17900000 { >> + compatible = "qcom,sdm845-gladiator-noc"; >> + reg = <0 0x17900000 0 0xd080>; >> + #interconnect-cells = <1>; >> + qcom,bcm-voters = <&apps_bcm_voter>; >> + }; >> + >> apps_rsc: rsc@179c0000 { >> label = "apps_rsc"; >> compatible = "qcom,rpmh-rsc"; >> @@ -3174,9 +3230,8 @@ >> }; >> }; >> >> - rsc_hlos: interconnect { >> - compatible = "qcom,sdm845-rsc-hlos"; >> - #interconnect-cells = <1>; > > With this reworking of the bindings the examples in these files are now > broken: > Documentation/devicetree/bindings/display/msm/gpu.txt > Documentation/devicetree/bindings/display/msm/dpu.txt > > It would be nice to fix them up in a subsequent change.
looks like most of them qcom display bindings are in the process of getting converted to yaml, we'll have to make sure that it gets addressed then.
> -Evan
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