Messages in this thread | | | Date | Tue, 25 Feb 2020 13:47:28 +0200 | From | Jarkko Sakkinen <> | Subject | Re: [PATCH 1/1] Add TPM 2.0 compatible I2C interface for chips with cr50 firmware. |
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On Tue, Feb 25, 2020 at 12:08:07PM +0100, Fabien Lahoudere wrote: > The firmware running on the currently supported H1 MCU requires a > special driver to handle its specific protocol, and this makes it > unsuitable to use tpm_tis_core_* and instead it must implement the > underlying TPM protocol similar to the other I2C TPM drivers. > > - All 4 byes of status register must be read/written at once. > - FIFO and burst count is limited to 63 and must be drained by AP. > - Provides an interrupt to indicate when read response data is ready > and when the TPM is finished processing write data. > > This driver is based on the existing infineon I2C TPM driver, which > most closely matches the cr50 i2c protocol behavior. The driver is > intentionally kept very similar in structure and style to the > corresponding drivers in coreboot and depthcharge. > > Signed-off-by: Duncan Laurie <dlaurie@chromium.org> > [swboyd@chromium.org: Depend on i2c even if it's a module, replace > boilier plate with SPDX tag, drop asm/byteorder.h include, simplify > return from probe] > Signed-off-by: Stephen Boyd <swboyd@chromium.org> > Signed-off-by: Fabien Lahoudere <fabien.lahoudere@collabora.com>
The code quality looks overally decent, checkpatch.pl does not complain and neither does sparse.
My only concern is the lack of tested-by's.
/Jarkko
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