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    Subject[PATCH 5.4 122/344] PCI: Increase D3 delay for AMD Ryzen5/7 XHCI controllers
    Date
    From: Daniel Drake <drake@endlessm.com>

    [ Upstream commit 3030df209aa8cf831b9963829bd9f94900ee8032 ]

    On Asus UX434DA (AMD Ryzen7 3700U) and Asus X512DK (AMD Ryzen5 3500U), the
    XHCI controller fails to resume from runtime suspend or s2idle, and USB
    becomes unusable from that point.

    xhci_hcd 0000:03:00.4: Refused to change power state, currently in D3
    xhci_hcd 0000:03:00.4: enabling device (0000 -> 0002)
    xhci_hcd 0000:03:00.4: WARN: xHC restore state timeout
    xhci_hcd 0000:03:00.4: PCI post-resume error -110!
    xhci_hcd 0000:03:00.4: HC died; cleaning up

    During suspend, a transition to D3cold is attempted, however the affected
    platforms do not seem to cut the power to the PCI device when in this
    state, so the device stays in D3hot.

    Upon resume, the D3hot-to-D0 transition is successful only if the D3 delay
    is increased to 20ms. The transition failure does not appear to be
    detectable as a CRS condition. Add a PCI quirk to increase the delay on the
    affected hardware.

    Link: https://bugzilla.kernel.org/show_bug.cgi?id=205587
    Link: http://lkml.kernel.org/r/CAD8Lp47Vh69gQjROYG69=waJgL7hs1PwnLonL9+27S_TcRhixA@mail.gmail.com
    Link: https://lore.kernel.org/r/20191127053836.31624-2-drake@endlessm.com
    Signed-off-by: Daniel Drake <drake@endlessm.com>
    Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
    Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/pci/quirks.c | 16 ++++++++++++++++
    1 file changed, 16 insertions(+)

    diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
    index 5c863af9452ec..7b6df2d8d6cde 100644
    --- a/drivers/pci/quirks.c
    +++ b/drivers/pci/quirks.c
    @@ -1889,6 +1889,22 @@ static void quirk_radeon_pm(struct pci_dev *dev)
    }
    DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x6741, quirk_radeon_pm);

    +/*
    + * Ryzen5/7 XHCI controllers fail upon resume from runtime suspend or s2idle.
    + * https://bugzilla.kernel.org/show_bug.cgi?id=205587
    + *
    + * The kernel attempts to transition these devices to D3cold, but that seems
    + * to be ineffective on the platforms in question; the PCI device appears to
    + * remain on in D3hot state. The D3hot-to-D0 transition then requires an
    + * extended delay in order to succeed.
    + */
    +static void quirk_ryzen_xhci_d3hot(struct pci_dev *dev)
    +{
    + quirk_d3hot_delay(dev, 20);
    +}
    +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x15e0, quirk_ryzen_xhci_d3hot);
    +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x15e1, quirk_ryzen_xhci_d3hot);
    +
    #ifdef CONFIG_X86_IO_APIC
    static int dmi_disable_ioapicreroute(const struct dmi_system_id *d)
    {
    --
    2.20.1


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