| From | Jiaxun Yang <> | Subject | [PATCH v4 10/10] MIPS: Loongson64: Move MIPS_CPU_IRQ_BASE | Date | Fri, 21 Feb 2020 13:09:25 +0800 |
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To prevent CPU IRQ collide with PCH IRQ, we move down CPU IRQ BASE to 16.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> --- arch/mips/include/asm/mach-loongson64/irq.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/mips/include/asm/mach-loongson64/irq.h b/arch/mips/include/asm/mach-loongson64/irq.h index 12208119aac0..1ce2e0bbe305 100644 --- a/arch/mips/include/asm/mach-loongson64/irq.h +++ b/arch/mips/include/asm/mach-loongson64/irq.h @@ -5,7 +5,7 @@ #include <boot_param.h> /* cpu core interrupt numbers */ -#define MIPS_CPU_IRQ_BASE 56 +#define MIPS_CPU_IRQ_BASE 16 #include_next <irq.h> #endif /* __ASM_MACH_LOONGSON64_IRQ_H_ */ -- 2.25.0
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