Messages in this thread | | | Date | Tue, 18 Feb 2020 18:13:31 +0000 | From | Mark Rutland <> | Subject | Re: [PATCH RFC 0/7] perf pmu-events: Support event aliasing for system PMUs |
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On Tue, Feb 18, 2020 at 05:58:46PM +0000, John Garry wrote: > On 18/02/2020 17:08, Mark Rutland wrote: > > > > I also don't understand how a SoC ID makes things > > > > any easier in this regard. > > > It's doesn't necessarily make things easier in this regard. But using a SoC > > > ID is an alternative to checking the SMMU_ID or the kernel driver having to > > > know that it was a MMU-600 at all. > > Using SOC_ID means that going forward, userspace needs to learn about > > the integration details of each SoC in order to identify a component. As > > you said: > > > > | As constantly checking what the SoC ID means throughout system components > > | does not scale. > > > > ... and I think that equally applies to userspace in this case. Who knows how > > many SoCs are going to have MMU-600? > > > > I also know that SOC_ID is going to be optional, and I think it's near-certain > > that someone will end up producing two SoCs exposing the same ID. > > Wouldn't different SoCs having same SMC SOC_ID and revision be a (fixable) > mistake in the SMC FW? > > And if it's not implemented, then no PMU events aliasing in perf tool for > those uncore PMUs - nothing gets broken though and no regression. But I do > understand your concern here. > > > For system PMUs, I'd rather the system PMU driver exposed some sort of > > implementation ID. e.g. the SMMU_ID for SMMU. We can give that a generic name, > > and mandate that where a driver exposes it, the format/meaning is defined in > > the documentation for the driver. > > Then doesn't that per-PMU ID qualify as brittle and non-standard also?
Not in my mind; any instances of the same IP can have the same ID, regardless of which SoC they're in. Once userspace learns about device-foo-4000, it knows about it on all SoCs. That also means you can support heterogeneous instances in the same SoC.
If a device varies so much on a SoC-by-SoC basis and or the driver has no idea what to expose, it could be legitimate for the PMU driver to expose the SoC ID as its PMU-specific ID, but I don't think we should make that the common/only case.
> At least the SMC SoC ID is according to some standard. > > And typically most PMU HW would have no ID reg, so where to even get this > identification info? Joakim Zhang seems to have this problem for the imx8 > DDRC PMU driver.
For imx8, the DT compat string or additional properties on the DDRC node could be used to imply the id.
> > That can be namespace by driver, so e.g. keys would be smmu_sysfs_name/<id> and > > ddrc_sysfs_name/<id>. > > > > > > > So even if it is solvable here, the kernel driver(s) will need to be > > > > > reworked. And that is just solving one case in many. > > > > PMU drivers will need to expose more information to userspace so that they > > > > can be identified more precisely, yes. I wouldn't say they would need to be > > > > "reworked". > > > OK, so some combination of changes would still be required for the SMMU > > > PMCG, IORT, and SMMUv3 drivers. > > To expose the SMMU ID, surely that's just the driver? > > This case is complicated, like others I anticipate. > > So the SMMU PMCG HW has no ID register itself, and this idea relies on using > the associated SMMUv3 IIDR in lieu. For that, we need to involve the IORT, > SMMUv3, and SMMU PMCG drivers to create this linkage, and even then I still > have my doubts on whether this is even proper.
Ok, I hadn't appreciated that the PMCG did not have an ID register itself.
I think that the relationship between the SMMU and PMCG is a stronger argument against using the SOC_ID. If the PMCGs in a system are heterogeneous, then you must know the type of the specific instance.
> Please see https://lore.kernel.org/linux-iommu/1569854031-237636-1-git-send-email-john.garry@huawei.com/ > for reference. > > Or are there > > implementations where the ID register is bogus and have to be overridden? > > > > I will also note that perf tool PMU events framework relies today on > generating a table of events aliases per CPU and matching based on that. If > you want to totally disassociate a CPU or any SoC ID mapping, then this will > require big perf tool rework.
I think that might be necessary, as otherwise we're going to back ourselves into a corner by building what's simple now.
Thanks, Mark.
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