Messages in this thread | | | Subject | Re: [PATCH v2 0/2] Add GPIO level-sensitive interrupt support | From | Alexandre Torgue <> | Date | Tue, 18 Feb 2020 19:10:12 +0100 |
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Hi Marek
On 2/18/20 5:25 PM, Marek Vasut wrote: > On 2/18/20 2:12 PM, Alexandre Torgue wrote: >> This series adds the possibility to handle gpio interrupts on level. >> >> GPIO hardware block is directly linked to EXTI block but EXTI handles >> external interrupts only on edge. To be able to handle GPIO interrupt on >> level a "hack" is done in gpio irq chip: parent interrupt (exti irq chip) >> is retriggered following interrupt type and gpio line value. >> >> In exti irq chip, retrigger ops function is added. > > btw. this might be unrelated, but is it possible to have e.g. gpioC2 set > as trigger-level-low and gpioD2 set as trigger-edge-falling ? It seems > 8eb2dfee9fb1 ("pinctrl: stm32: add lock mechanism for irqmux selection") > prevents that. >
No it's not possible. Each gpio line doesn't have a dedicated Exti line Each Exti line is muxing between gpio banks.
Mapping is done as following:
EXTI0 = A0 or B0 or C0 .... or Z0 : selected by Mux EXTI1 = A1 or B1 or C1 ....or Z1 : selected by Mux EXTI2 = A2 or B2 or C2 ....or Z2 : selected by Mux ...
regards Alexandre
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