Messages in this thread | | | Subject | Re: [PATCH 1/4] clk: at91: usb: continue if clk_hw_round_rate() return zero | From | Stephen Boyd <> | Date | Wed, 12 Feb 2020 15:32:03 -0800 |
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Quoting Claudiu Beznea (2020-01-17 03:36:46) > clk_hw_round_rate() may call round rate function of its parents. In case > of SAM9X60 two of USB parrents are PLLA and UPLL. These clocks are > controlled by clk-sam9x60-pll.c driver. The round rate function for this > driver is sam9x60_pll_round_rate() which call in turn > sam9x60_pll_get_best_div_mul(). In case the requested rate is not in the > proper range (rate < characteristics->output[0].min && > rate > characteristics->output[0].max) the sam9x60_pll_round_rate() will > return a negative number to its caller (called by > clk_core_round_rate_nolock()). clk_hw_round_rate() will return zero in > case a negative number is returned by clk_core_round_rate_nolock(). With > this, the USB clock will continue its rate computation even caller of > clk_hw_round_rate() returned an error. With this, the USB clock on SAM9X60 > may not chose the best parent. I detected this after a suspend/resume > cycle on SAM9X60. > > Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> > ---
Applied to clk-next
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