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    Subject[PATCH AUTOSEL 5.10 069/217] drm/amd/amdgpu: Add rev_id workaround logic for SRIOV setup
    Date
    From: Bokun Zhang <Bokun.Zhang@amd.com>

    [ Upstream commit de21e4aeb2b26128dcc5be1bcb2fafa73d041e51 ]

    - When we are under SRIOV setup, the rev_id cannot be read
    properly. Therefore, we will return default value for it

    Signed-off-by: Bokun Zhang <Bokun.Zhang@amd.com>
    Reviewed-by: Monk Liu <monk.liu@amd.com>
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c | 11 ++++++++++-
    1 file changed, 10 insertions(+), 1 deletion(-)

    diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c b/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
    index 7429f30398b9d..cd822ea78ffbc 100644
    --- a/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
    +++ b/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
    @@ -51,8 +51,17 @@ static void nbio_v2_3_remap_hdp_registers(struct amdgpu_device *adev)

    static u32 nbio_v2_3_get_rev_id(struct amdgpu_device *adev)
    {
    - u32 tmp = RREG32_SOC15(NBIO, 0, mmRCC_DEV0_EPF0_STRAP0);
    + u32 tmp;

    + /*
    + * guest vm gets 0xffffffff when reading RCC_DEV0_EPF0_STRAP0,
    + * therefore we force rev_id to 0 (which is the default value)
    + */
    + if (amdgpu_sriov_vf(adev)) {
    + return 0;
    + }
    +
    + tmp = RREG32_SOC15(NBIO, 0, mmRCC_DEV0_EPF0_STRAP0);
    tmp &= RCC_DEV0_EPF0_STRAP0__STRAP_ATI_REV_ID_DEV0_F0_MASK;
    tmp >>= RCC_DEV0_EPF0_STRAP0__STRAP_ATI_REV_ID_DEV0_F0__SHIFT;

    --
    2.27.0
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