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    Subject[PATCH AUTOSEL 5.4 072/130] arm64: tegra: Fix GIC400 missing GICH/GICV register regions
    Date
    From: Marc Zyngier <maz@kernel.org>

    [ Upstream commit 776a3c04da9fa144241476f4a0d263899d6cad26 ]

    GIC400 has full support for virtualization, and yet the tegra186
    DT doesn't expose the GICH/GICV regions (despite exposing the
    maintenance interrupt that only makes sense for virtualization).

    Add the missing regions, based on the hunch that the HW doesn't
    use the CPU build-in interfaces, but instead the external ones
    provided by the GIC. KVM's virtual GIC now works with this change.

    Signed-off-by: Marc Zyngier <maz@kernel.org>
    Signed-off-by: Thierry Reding <treding@nvidia.com>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    arch/arm64/boot/dts/nvidia/tegra186.dtsi | 4 +++-
    1 file changed, 3 insertions(+), 1 deletion(-)

    diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
    index 9abf0cb1dd67f..f72c97fe4afc8 100644
    --- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
    +++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
    @@ -569,7 +569,9 @@ gic: interrupt-controller@3881000 {
    #interrupt-cells = <3>;
    interrupt-controller;
    reg = <0x0 0x03881000 0x0 0x1000>,
    - <0x0 0x03882000 0x0 0x2000>;
    + <0x0 0x03882000 0x0 0x2000>,
    + <0x0 0x03884000 0x0 0x2000>,
    + <0x0 0x03886000 0x0 0x2000>;
    interrupts = <GIC_PPI 9
    (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
    interrupt-parent = <&gic>;
    --
    2.27.0
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