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SubjectRe: [PATCH net v3] net: mvpp2: Fix GoP port 3 Networking Complex Control configurations
Hi Stefan,

czw., 17 gru 2020 o 13:40 <stefanc@marvell.com> napisał(a):
>
> From: Stefan Chulski <stefanc@marvell.com>
>
> During GoP port 2 Networking Complex Control mode of operation configurations,
> also GoP port 3 mode of operation was wrongly set.
> Patch removes these configurations.
> GENCONF_CTRL0_PORTX naming also fixed.
>
> Cc: stable@vger.kernel.org
> Fixes: f84bf386f395 ("net: mvpp2: initialize the GoP")
> Signed-off-by: Stefan Chulski <stefanc@marvell.com>
> ---
>
> Changes in v3:
> - Added cc stable@vger.kernel.org
> Changes in v2:
> - Added Fixes tag.
>
> drivers/net/ethernet/marvell/mvpp2/mvpp2.h | 6 +++---
> drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 8 ++++----
> 2 files changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2.h b/drivers/net/ethernet/marvell/mvpp2/mvpp2.h
> index 6bd7e40..39c4e5c 100644
> --- a/drivers/net/ethernet/marvell/mvpp2/mvpp2.h
> +++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2.h
> @@ -651,9 +651,9 @@
> #define GENCONF_PORT_CTRL1_EN(p) BIT(p)
> #define GENCONF_PORT_CTRL1_RESET(p) (BIT(p) << 28)
> #define GENCONF_CTRL0 0x1120
> -#define GENCONF_CTRL0_PORT0_RGMII BIT(0)
> -#define GENCONF_CTRL0_PORT1_RGMII_MII BIT(1)
> -#define GENCONF_CTRL0_PORT1_RGMII BIT(2)
> +#define GENCONF_CTRL0_PORT2_RGMII BIT(0)
> +#define GENCONF_CTRL0_PORT3_RGMII_MII BIT(1)
> +#define GENCONF_CTRL0_PORT3_RGMII BIT(2)
>
> /* Various constants */
>
> diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
> index d64dc12..d2b0506 100644
> --- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
> +++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
> @@ -1231,9 +1231,9 @@ static void mvpp22_gop_init_rgmii(struct mvpp2_port *port)
>
> regmap_read(priv->sysctrl_base, GENCONF_CTRL0, &val);
> if (port->gop_id == 2)
> - val |= GENCONF_CTRL0_PORT0_RGMII | GENCONF_CTRL0_PORT1_RGMII;
> + val |= GENCONF_CTRL0_PORT2_RGMII;
> else if (port->gop_id == 3)
> - val |= GENCONF_CTRL0_PORT1_RGMII_MII;
> + val |= GENCONF_CTRL0_PORT3_RGMII_MII;
> regmap_write(priv->sysctrl_base, GENCONF_CTRL0, val);
> }
>
> @@ -1250,9 +1250,9 @@ static void mvpp22_gop_init_sgmii(struct mvpp2_port *port)
> if (port->gop_id > 1) {
> regmap_read(priv->sysctrl_base, GENCONF_CTRL0, &val);
> if (port->gop_id == 2)
> - val &= ~GENCONF_CTRL0_PORT0_RGMII;
> + val &= ~GENCONF_CTRL0_PORT2_RGMII;
> else if (port->gop_id == 3)
> - val &= ~GENCONF_CTRL0_PORT1_RGMII_MII;
> + val &= ~GENCONF_CTRL0_PORT3_RGMII_MII;
> regmap_write(priv->sysctrl_base, GENCONF_CTRL0, val);
> }
> }
> --

I tested the patch and LGTM.

Acked-by: Marcin Wojtas <mw@semihalf.com>

Thanks,
Marcin

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