lkml.org 
[lkml]   [2020]   [Dec]   [17]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
SubjectRe: [PATCH v2 00/13] Clean up the pll_en_bit from en_mask on all the MediaTek clock drivers
From
Date
Quoting Weiyi Lu (2020-11-08 18:13:15)
> This series is based on v5.10-rc1 and
> [v5,07/24] clk: mediatek: Fix asymmetrical PLL enable and disable control[1] in Mediatek MT8192 clock support series
>
> [1] https://patchwork.kernel.org/project/linux-mediatek/patch/1604887429-29445-8-git-send-email-weiyi.lu@mediatek.com/
>
> change since v1:
> - add patch for MT8167

The last patch doesn't apply. Also the whole series is base64 encoded
and confuses my MUA. Please resend.

\
 
 \ /
  Last update: 2020-12-17 10:19    [W:0.071 / U:0.016 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site