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SubjectRe: [PATCH 3/5] irqchip/bcm2836: Make IPIs use handle_percpu_devid_irq()
On 2020-12-15 11:14, Valentin Schneider wrote:
> On 15/12/20 10:19, Marc Zyngier wrote:
>> Hi Gunter,
>>
>> On 2020-12-15 00:21, Guenter Roeck wrote:
>>> On Mon, Nov 09, 2020 at 09:41:19AM +0000, Valentin Schneider wrote:
>>>> As done for the Arm GIC irqchips, move IPIs to
>>>> handle_percpu_devid_irq() as
>>>> handle_percpu_devid_fasteoi_ipi() isn't actually required.
>>>>
>>>> Signed-off-by: Valentin Schneider <valentin.schneider@arm.com>
>>>
>>> This patch results in boot failures (silent stall) for the qemu
>>> raspi2 emulation. Unfortunately it can not be reverted because
>>> handle_percpu_devid_fasteoi_ipi no longer exists in next-20201214,
>>> so I don't know if it is the only problem.
>>
>> This is odd. This works just fine for me on both the RPi2 and 3
>> emulation, running a full Debian userspace. Could this be caused
>> by the version of QEMU you are using? Here's what I have:
>>
>> $ qemu-system-arm --version
>> QEMU emulator version 5.1.0 (Debian 1:5.1+dfsg-4+b1)
>>
>> Could you try the following hack and let me know if that helps?
>>
>
> Thanks for looking into this. It does look like I inverted the ordering
> of
> that mailbox write vs the handling of the IPI. I don't see how the IPI
> could mess with the mailbox (unless some creative use of irq_work /
> smp_call), but in any case having the write in irq_ack() as you've done
> below should restore said ordering.

This hack indeed brings us back to the previous situation, where we
allowed the interrupt to be re-generated while handling the IPI.

Still, that doesn't explain why I'm not experiencing any issue here.
I hope that the various CI bots will let us know if anything is broken
on real HW.

M.
--
Jazz is not dead. It just smells funny...

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