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SubjectRe: [PATCH v6] char: tpm: add i2c driver for cr50
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On Fri, 11 Dec 2020, Jarkko Sakkinen <jarkko@kernel.org> wrote:
> On Wed, Dec 09, 2020 at 02:41:45PM +0200, Adrian Ratiu wrote:
>> On Tue, 08 Dec 2020, Jarkko Sakkinen <jarkko@kernel.org> wrote:
>> > On Mon, Dec 07, 2020 at 04:20:16PM +0200, Adrian Ratiu wrote:
>> > > From: "dlaurie@chromium.org" <dlaurie@chromium.org> Add
>> > > TPM 2.0 compatible I2C interface for chips with cr50
>> > > firmware. The firmware running on the currently supported
>> > > H1 MCU requires a special driver to handle its specific
>> > > protocol, and this makes it unsuitable to use
>> > > tpm_tis_core_* and instead it must implement the underlying
>> > > TPM protocol similar to the other I2C TPM drivers. - All
>> > > 4 bytes of status register must be read/written at once. -
>> > > FIFO and burst count is limited to 63 and must be drained
>> > > by AP. - Provides an interrupt to indicate when read
>> > > response data is ready and when the TPM is finished
>> > > processing write data. This driver is based on the
>> > > existing infineon I2C TPM driver, which most closely
>> > > matches the cr50 i2c protocol behavior.
>> > Starts to look legit. Has anyone tested this?
>> I tested on an x86_64 Chromebook EVE (aka Google Pixelbook) by
>> chainloading in legacy mode and booting into a Yocto-based
>> userspace (meta-chromebook) where I used tpm2-tools to
>> communicate with the chip and also built and tested a
>> ChromiumOS userspace in developer mode. I do not have access
>> to other HW which has this chip, so it is about as much testing
>> I can do to confirm the driver works on this HW. Adrian
>
> So can you respond to this with tested-by. It's sufficient
> because collateral effects of driver failing are insignificant
> for the kernel as whole.

Tested-by: Adrian Ratiu <adrian.ratiu@collabora.com>

>
> /Jarkko

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