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    SubjectRe: [PATCH v4 06/17] PCI: add SIOV and IMS capability detection
    On Sun, Nov 08, 2020 at 06:34:55PM +0000, David Woodhouse wrote:
    > >
    > > When we do interrupt remapping support in guest which would be required
    > > if we support x2apic in guest, I think this is something we should look into more
    > > carefully to make this work.
    >
    > No, interrupt remapping is not required for X2APIC in guests
    >
    > They can have X2APIC and up to 32768 CPUs without needing interrupt

    How is this made available today without interrupt remapping?

    I thought without IR, the destination ID is still limited to only 8 bits?

    On native, even if you have less than 255 cpu's but the APICID are sparsly
    distributed due to platform rules, the x2apic id could be more than 8 bits.
    Which is why the spec requires IR when x2apic is enabled.

    > remapping at all. Only if they want more than 32768 vCPUs, or to do
    > nested virtualisation and actually remap for the benefit of *their*
    > (L2+) guests would they need IR.

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