lkml.org 
[lkml]   [2020]   [Nov]   [8]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    Patch in this message
    /
    From
    Subject[PATCH v3 6/9] dt-bindings: clock: document the fsl-flexspi-clk driver
    Date
    Signed-off-by: Michael Walle <michael@walle.cc>
    Reviewed-by: Rob Herring <robh@kernel.org>
    ---
    Changes since v2:
    - none

    Changes since v1:
    - new patch

    .../bindings/clock/fsl,flexspi-clock.yaml | 55 +++++++++++++++++++
    1 file changed, 55 insertions(+)
    create mode 100644 Documentation/devicetree/bindings/clock/fsl,flexspi-clock.yaml

    diff --git a/Documentation/devicetree/bindings/clock/fsl,flexspi-clock.yaml b/Documentation/devicetree/bindings/clock/fsl,flexspi-clock.yaml
    new file mode 100644
    index 000000000000..1fa390ee7b9b
    --- /dev/null
    +++ b/Documentation/devicetree/bindings/clock/fsl,flexspi-clock.yaml
    @@ -0,0 +1,55 @@
    +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    +%YAML 1.2
    +---
    +$id: http://devicetree.org/schemas/clock/fsl,flexspi-clock.yaml#
    +$schema: http://devicetree.org/meta-schemas/core.yaml#
    +
    +title: Freescale FlexSPI clock driver for Layerscape SoCs
    +
    +maintainers:
    + - Michael Walle <michael@walle.cc>
    +
    +description:
    + The Freescale Layerscape SoCs have a special FlexSPI clock which is
    + derived from the platform PLL.
    +
    +properties:
    + compatible:
    + enum:
    + - fsl,ls1028a-flexspi-clk
    + - fsl,lx2160a-flexspi-clk
    +
    + reg:
    + maxItems: 1
    +
    + clocks:
    + maxItems: 1
    +
    + '#clock-cells':
    + const: 0
    +
    + clock-output-names:
    + maxItems: 1
    +
    +required:
    + - compatible
    + - reg
    + - clocks
    + - '#clock-cells'
    +
    +additionalProperties: false
    +
    +examples:
    + - |
    + dcfg {
    + #address-cells = <1>;
    + #size-cells = <1>;
    +
    + fspi_clk: clock-controller@900 {
    + compatible = "fsl,ls1028a-flexspi-clk";
    + reg = <0x900 0x4>;
    + #clock-cells = <0>;
    + clocks = <&parentclk>;
    + clock-output-names = "fspi_clk";
    + };
    + };
    --
    2.20.1
    \
     
     \ /
      Last update: 2020-11-08 19:53    [W:4.073 / U:0.012 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site