Messages in this thread | | | Date | Fri, 06 Nov 2020 00:11:53 -0800 (PST) | Subject | Re: [RFC PATCH 0/3] Add Microchip PolarFire Soc Support | From | Palmer Dabbelt <> |
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On Thu, 05 Nov 2020 23:37:45 PST (-0800), atishp@atishpatra.org wrote: > On Thu, Nov 5, 2020 at 11:14 PM Palmer Dabbelt <palmer@dabbelt.com> wrote: >> >> On Wed, 28 Oct 2020 16:27:56 PDT (-0700), Atish Patra wrote: >> > This series adds minimal support for Microchip Polar Fire Soc Icicle kit. >> > It is rebased on v5.10-rc1 and depends on clock support. >> > Only MMC and ethernet drivers are enabled via this series. >> > The idea here is to add the foundational patches so that other drivers >> > can be added to on top of this. >> > >> > This series has been tested on Qemu and Polar Fire Soc Icicle kit. >> > The following qemu series is necessary to test it on Qemu. >> > >> > The series can also be found at the following github repo. >> > >> > I noticed the latest version of mmc driver[2] hangs on the board with >> > the latest clock driver. That's why, I have tested with the old clock >> > driver available in the above github repo. >> >> OK, I guess that's why it's an RFC? >> > > Yes. The latest clock/pcie driver did not work for me. I might have > missed something in DT. > The idea for RFC is so that anybody who wants to try the latest kernel > on a polarfire board > has a meaningful way to test it. > >> > [1] https://lists.nongnu.org/archive/html/qemu-devel/2020-10/msg08582.html >> > [2] https://www.spinics.net/lists/devicetree/msg383626.html >> >> Looks like this one hasn't been merged yet. IDK if something is broken with my >> mail client but I'm not seeing any github repos. If this depends on >> not-yet-merged drivers then it's certainly RFC material, but aside from the DT >> stuff (which should be straight-forward) it seems fine to me. >> > > I think it makes sense to take this series once the clock driver is > merged at least. > >> Since you posted this an an RFC I'm going to assume you're going to re-spin it. >> > > Yes. There are some feedbacks on DT which I will fix in v2.
Thanks!
> >> Thanks! >> >> > >> > Atish Patra (3): >> > RISC-V: Add Microchip PolarFire SoC kconfig option >> > RISC-V: Initial DTS for Microchip ICICLE board >> > RISC-V: Enable Microchip PolarFire ICICLE SoC >> > >> > arch/riscv/Kconfig.socs | 7 + >> > arch/riscv/boot/dts/Makefile | 1 + >> > arch/riscv/boot/dts/microchip/Makefile | 2 + >> > .../microchip/microchip-icicle-kit-a000.dts | 313 ++++++++++++++++++ >> > arch/riscv/configs/defconfig | 4 + >> > 5 files changed, 327 insertions(+) >> > create mode 100644 arch/riscv/boot/dts/microchip/Makefile >> > create mode 100644 arch/riscv/boot/dts/microchip/microchip-icicle-kit-a000.dts >> >> _______________________________________________ >> linux-riscv mailing list >> linux-riscv@lists.infradead.org >> http://lists.infradead.org/mailman/listinfo/linux-riscv
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