Messages in this thread Patch in this message | | | From | kan.liang@linux ... | Subject | [PATCH 2/3] perf/x86/intel: Set PERF_ATTACH_SCHED_CB for large PEBS | Date | Fri, 6 Nov 2020 13:29:34 -0800 |
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From: Kan Liang <kan.liang@linux.intel.com>
To supply a PID/TID for large PEBS, it requires flushing the PEBS buffer in a context switch.
Set PERF_ATTACH_SCHED_CB for the event with large PEBS.
Fixes: 9c964efa4330 ("perf/x86/intel: Drain the PEBS buffer during context switches") Signed-off-by: Kan Liang <kan.liang@linux.intel.com> --- arch/x86/events/intel/core.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c index c79748f6921d..fe922be94b6d 100644 --- a/arch/x86/events/intel/core.c +++ b/arch/x86/events/intel/core.c @@ -3565,8 +3565,10 @@ static int intel_pmu_hw_config(struct perf_event *event) if (!(event->attr.freq || (event->attr.wakeup_events && !event->attr.watermark))) { event->hw.flags |= PERF_X86_EVENT_AUTO_RELOAD; if (!(event->attr.sample_type & - ~intel_pmu_large_pebs_flags(event))) + ~intel_pmu_large_pebs_flags(event))) { event->hw.flags |= PERF_X86_EVENT_LARGE_PEBS; + event->attach_state |= PERF_ATTACH_SCHED_CB; + } } if (x86_pmu.pebs_aliases) x86_pmu.pebs_aliases(event); -- 2.17.1
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