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Subject[PATCH 1/6] dt-bindings: interrupt-controller: Add binding for the Microsemi Luton interrupt controller
Date
Add the Device Tree binding documentation for the Microsemi Luton
interrupt controller that is part of the ICPU. It is connected directly to
the MIPS core interrupt controller.

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
---
.../bindings/interrupt-controller/mscc,ocelot-icpu-intr.txt | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.txt b/Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.txt
index f5baeccb689f..94dc95cb815c 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.txt
+++ b/Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.txt
@@ -1,8 +1,10 @@
Microsemi Ocelot SoC ICPU Interrupt Controller

+Luton belongs the same family of Ocelot: the VCoreIII family
+
Required properties:

-- compatible : should be "mscc,ocelot-icpu-intr"
+- compatible : should be "mscc,ocelot-icpu-intr" or "mscc,luton-icpu-intr"
- reg : Specifies base physical address and size of the registers.
- interrupt-controller : Identifies the node as an interrupt controller
- #interrupt-cells : Specifies the number of cells needed to encode an
--
2.28.0
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