Messages in this thread Patch in this message | | | From | Minas Harutyunyan <> | Subject | Re: [PATCH 2/3] usb: dwc2: enable FS/LS PHY clock select on STM32MP15 FS OTG | Date | Mon, 30 Nov 2020 06:17:08 +0000 |
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On 11/23/2020 1:01 PM, Amelie Delaunay wrote: > When the core is in FS host mode, using the FS transceiver, and a Low-Speed > device is connected, transceiver clock is 6Mhz. > So, to support Low-Speed devices, enable support of FS/LS Low Power mode, > so that the PHY supplies a 6 MHz clock during Low-Speed mode. > > Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Acked-by: Minas Harutyunyan <Minas.Harutyunyan@synopsys.com>
> --- > drivers/usb/dwc2/params.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c > index 0df693319f0a..9e5dd7f3f2f6 100644 > --- a/drivers/usb/dwc2/params.c > +++ b/drivers/usb/dwc2/params.c > @@ -179,6 +179,8 @@ static void dwc2_set_stm32mp15_fsotg_params(struct dwc2_hsotg *hsotg) > p->activate_stm_id_vb_detection = true; > p->ahbcfg = GAHBCFG_HBSTLEN_INCR16 << GAHBCFG_HBSTLEN_SHIFT; > p->power_down = DWC2_POWER_DOWN_PARAM_NONE; > + p->host_support_fs_ls_low_power = true; > + p->host_ls_low_power_phy_clk = true; > } > > static void dwc2_set_stm32mp15_hsotg_params(struct dwc2_hsotg *hsotg) >
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