Messages in this thread | | | Date | Tue, 01 Dec 2020 10:08:43 +0530 | From | Sai Prakash Ranjan <> | Subject | Re: [PATCH v2 2/4] arm64: dts: qcom: sm8250: Add support for LLCC block |
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On 2020-11-30 15:09, Manivannan Sadhasivam wrote: > Add support for Last Level Cache Controller (LLCC) in SM8250 SoC. > This LLCC is used to provide common cache memory pool for the cores in > the SM8250 SoC thereby minimizing the percore caches. > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > --- > arch/arm64/boot/dts/qcom/sm8250.dtsi | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi > b/arch/arm64/boot/dts/qcom/sm8250.dtsi > index 65acd1f381eb..118b6bb29ebc 100644 > --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi > @@ -1758,6 +1758,12 @@ usb_1_dwc3: dwc3@a600000 { > }; > }; > > + system-cache-controller@9200000 { > + compatible = "qcom,sm8250-llcc"; > + reg = <0 0x09200000 0 0x1d0000>, <0 0x09600000 0 0x50000>; > + reg-names = "llcc_base", "llcc_broadcast_base"; > + }; > + > usb_2: usb@a8f8800 { > compatible = "qcom,sm8250-dwc3", "qcom,dwc3"; > reg = <0 0x0a8f8800 0 0x400>;
Reviewed-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
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