lkml.org 
[lkml]   [2020]   [Nov]   [3]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    Patch in this message
    /
    From
    Subject[PATCH 5.9 193/391] perf/amd/uncore: Set all slices and threads to restore perf stat -a behaviour
    Date
    From: Kim Phillips <kim.phillips@amd.com>

    commit c8fe99d0701fec9fb849ec880a86bc5592530496 upstream.

    Commit 2f217d58a8a0 ("perf/x86/amd/uncore: Set the thread mask for
    F17h L3 PMCs") inadvertently changed the uncore driver's behaviour
    wrt perf tool invocations with or without a CPU list, specified with
    -C / --cpu=.

    Change the behaviour of the driver to assume the former all-cpu (-a)
    case, which is the more commonly desired default. This fixes
    '-a -A' invocations without explicit cpu lists (-C) to not count
    L3 events only on behalf of the first thread of the first core
    in the L3 domain.

    BEFORE:

    Activity performed by the first thread of the last core (CPU#43) in
    CPU#40's L3 domain is not reported by CPU#40:

    sudo perf stat -a -A -e l3_request_g1.caching_l3_cache_accesses taskset -c 43 perf bench mem memcpy -s 32mb -l 100 -f default
    ...
    CPU36 21,835 l3_request_g1.caching_l3_cache_accesses
    CPU40 87,066 l3_request_g1.caching_l3_cache_accesses
    CPU44 17,360 l3_request_g1.caching_l3_cache_accesses
    ...

    AFTER:

    The L3 domain activity is now reported by CPU#40:

    sudo perf stat -a -A -e l3_request_g1.caching_l3_cache_accesses taskset -c 43 perf bench mem memcpy -s 32mb -l 100 -f default
    ...
    CPU36 354,891 l3_request_g1.caching_l3_cache_accesses
    CPU40 1,780,870 l3_request_g1.caching_l3_cache_accesses
    CPU44 315,062 l3_request_g1.caching_l3_cache_accesses
    ...

    Fixes: 2f217d58a8a0 ("perf/x86/amd/uncore: Set the thread mask for F17h L3 PMCs")
    Signed-off-by: Kim Phillips <kim.phillips@amd.com>
    Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
    Cc: stable@vger.kernel.org
    Link: https://lkml.kernel.org/r/20200908214740.18097-2-kim.phillips@amd.com
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

    ---
    arch/x86/events/amd/uncore.c | 28 ++++++++--------------------
    1 file changed, 8 insertions(+), 20 deletions(-)

    --- a/arch/x86/events/amd/uncore.c
    +++ b/arch/x86/events/amd/uncore.c
    @@ -181,28 +181,16 @@ static void amd_uncore_del(struct perf_e
    }

    /*
    - * Convert logical CPU number to L3 PMC Config ThreadMask format
    + * Return a full thread and slice mask until per-CPU is
    + * properly supported.
    */
    -static u64 l3_thread_slice_mask(int cpu)
    +static u64 l3_thread_slice_mask(void)
    {
    - u64 thread_mask, core = topology_core_id(cpu);
    - unsigned int shift, thread = 0;
    + if (boot_cpu_data.x86 <= 0x18)
    + return AMD64_L3_SLICE_MASK | AMD64_L3_THREAD_MASK;

    - if (topology_smt_supported() && !topology_is_primary_thread(cpu))
    - thread = 1;
    -
    - if (boot_cpu_data.x86 <= 0x18) {
    - shift = AMD64_L3_THREAD_SHIFT + 2 * (core % 4) + thread;
    - thread_mask = BIT_ULL(shift);
    -
    - return AMD64_L3_SLICE_MASK | thread_mask;
    - }
    -
    - core = (core << AMD64_L3_COREID_SHIFT) & AMD64_L3_COREID_MASK;
    - shift = AMD64_L3_THREAD_SHIFT + thread;
    - thread_mask = BIT_ULL(shift);
    -
    - return AMD64_L3_EN_ALL_SLICES | core | thread_mask;
    + return AMD64_L3_EN_ALL_SLICES | AMD64_L3_EN_ALL_CORES |
    + AMD64_L3_F19H_THREAD_MASK;
    }

    static int amd_uncore_event_init(struct perf_event *event)
    @@ -232,7 +220,7 @@ static int amd_uncore_event_init(struct
    * For other events, the two fields do not affect the count.
    */
    if (l3_mask && is_llc_event(event))
    - hwc->config |= l3_thread_slice_mask(event->cpu);
    + hwc->config |= l3_thread_slice_mask();

    uncore = event_to_amd_uncore(event);
    if (!uncore)

    \
     
     \ /
      Last update: 2020-11-03 22:55    [W:4.302 / U:0.468 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site