Messages in this thread | | | Subject | Re: [PATCH v2 6/6] MIPS: Loongson64: Move decode_cpucfg() to loongson_regs.h | From | Jiaxun Yang <> | Date | Tue, 3 Nov 2020 13:33:13 +0800 |
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在 2020/11/3 11:15, Tiezhu Yang 写道: > Since decode_cpucfg() is only used for Loongson64, just move > it to loongson_regs.h to avoid the pollution of common code > with #ifdef CONFIG_CPU_LOONGSON64. > > Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Hi all,
Don't know if it's a good idea to move this piece of code around... Also I do think loongson_regs.h should be a common header while cpucfg_decode won't be reused else where.
But I do respect Thomas's decision if it's necessary.
Thanks
- Jiaxun
> --- > > v2: No changes > > .../include/asm/mach-loongson64/loongson_regs.h | 24 +++++++++++++++++ > arch/mips/kernel/cpu-probe.c | 31 +--------------------- > 2 files changed, 25 insertions(+), 30 deletions(-) > > diff --git a/arch/mips/include/asm/mach-loongson64/loongson_regs.h b/arch/mips/include/asm/mach-loongson64/loongson_regs.h > index 1659935..2d469d6 100644 > --- a/arch/mips/include/asm/mach-loongson64/loongson_regs.h > +++ b/arch/mips/include/asm/mach-loongson64/loongson_regs.h > @@ -129,6 +129,30 @@ static inline u32 read_cpucfg(u32 reg) > #define LOONGSON_CFG7_GCCAEQRP BIT(0) > #define LOONGSON_CFG7_UCAWINP BIT(1) > > +static inline void decode_cpucfg(struct cpuinfo_mips *c) > +{ > + u32 cfg1 = read_cpucfg(LOONGSON_CFG1); > + u32 cfg2 = read_cpucfg(LOONGSON_CFG2); > + u32 cfg3 = read_cpucfg(LOONGSON_CFG3); > + > + if (cfg1 & LOONGSON_CFG1_MMI) > + c->ases |= MIPS_ASE_LOONGSON_MMI; > + > + if (cfg2 & LOONGSON_CFG2_LEXT1) > + c->ases |= MIPS_ASE_LOONGSON_EXT; > + > + if (cfg2 & LOONGSON_CFG2_LEXT2) > + c->ases |= MIPS_ASE_LOONGSON_EXT2; > + > + if (cfg2 & LOONGSON_CFG2_LSPW) { > + c->options |= MIPS_CPU_LDPTE; > + c->guest.options |= MIPS_CPU_LDPTE; > + } > + > + if (cfg3 & LOONGSON_CFG3_LCAMP) > + c->ases |= MIPS_ASE_LOONGSON_CAM; > +} > + > static inline bool cpu_has_csr(void) > { > if (cpu_has_cfg()) > diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c > index e685369..1fa2c8b 100644 > --- a/arch/mips/kernel/cpu-probe.c > +++ b/arch/mips/kernel/cpu-probe.c > @@ -31,6 +31,7 @@ > #include "fpu-probe.h" > > #include <asm/mach-loongson64/cpucfg-emul.h> > +#include <asm/mach-loongson64/loongson_regs.h> > > /* Hardware capabilities */ > unsigned int elf_hwcap __read_mostly; > @@ -1692,33 +1693,6 @@ static inline void cpu_probe_cavium(struct cpuinfo_mips *c, unsigned int cpu) > } > } > > -#ifdef CONFIG_CPU_LOONGSON64 > -#include <loongson_regs.h> > - > -static inline void decode_cpucfg(struct cpuinfo_mips *c) > -{ > - u32 cfg1 = read_cpucfg(LOONGSON_CFG1); > - u32 cfg2 = read_cpucfg(LOONGSON_CFG2); > - u32 cfg3 = read_cpucfg(LOONGSON_CFG3); > - > - if (cfg1 & LOONGSON_CFG1_MMI) > - c->ases |= MIPS_ASE_LOONGSON_MMI; > - > - if (cfg2 & LOONGSON_CFG2_LEXT1) > - c->ases |= MIPS_ASE_LOONGSON_EXT; > - > - if (cfg2 & LOONGSON_CFG2_LEXT2) > - c->ases |= MIPS_ASE_LOONGSON_EXT2; > - > - if (cfg2 & LOONGSON_CFG2_LSPW) { > - c->options |= MIPS_CPU_LDPTE; > - c->guest.options |= MIPS_CPU_LDPTE; > - } > - > - if (cfg3 & LOONGSON_CFG3_LCAMP) > - c->ases |= MIPS_ASE_LOONGSON_CAM; > -} > - > static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu) > { > decode_configs(c); > @@ -1787,9 +1761,6 @@ static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu) > break; > } > } > -#else > -static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu) { } > -#endif > > static inline void cpu_probe_ingenic(struct cpuinfo_mips *c, unsigned int cpu) > {
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