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    SubjectRe: [PATCH v2 07/18] arm: dts: owl-s500: Add pinctrl & GPIO support
    On Fri, Nov 20, 2020 at 01:56:01AM +0200, Cristian Ciocaltea wrote:
    > Add pinctrl node for Actions Semi S500 SoC.
    >
    > Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>

    Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>

    Thanks,
    Mani

    > ---
    > arch/arm/boot/dts/owl-s500.dtsi | 20 ++++++++++++++++++++
    > 1 file changed, 20 insertions(+)
    >
    > diff --git a/arch/arm/boot/dts/owl-s500.dtsi b/arch/arm/boot/dts/owl-s500.dtsi
    > index 449e9807c4ec..b16172615db0 100644
    > --- a/arch/arm/boot/dts/owl-s500.dtsi
    > +++ b/arch/arm/boot/dts/owl-s500.dtsi
    > @@ -6,6 +6,7 @@
    > */
    >
    > #include <dt-bindings/clock/actions,s500-cmu.h>
    > +#include <dt-bindings/gpio/gpio.h>
    > #include <dt-bindings/interrupt-controller/arm-gic.h>
    > #include <dt-bindings/power/owl-s500-powergate.h>
    > #include <dt-bindings/reset/actions,s500-reset.h>
    > @@ -208,6 +209,25 @@ sps: power-controller@b01b0100 {
    > #power-domain-cells = <1>;
    > };
    >
    > + pinctrl: pinctrl@b01b0000 {
    > + compatible = "actions,s500-pinctrl";
    > + reg = <0xb01b0000 0x40>, /* GPIO */
    > + <0xb01b0040 0x10>, /* Multiplexing Control */
    > + <0xb01b0060 0x18>, /* PAD Control */
    > + <0xb01b0080 0xc>; /* PAD Drive Capacity */
    > + clocks = <&cmu CLK_GPIO>;
    > + gpio-controller;
    > + gpio-ranges = <&pinctrl 0 0 132>;
    > + #gpio-cells = <2>;
    > + interrupt-controller;
    > + #interrupt-cells = <2>;
    > + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, /* GPIOA */
    > + <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, /* GPIOB */
    > + <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, /* GPIOC */
    > + <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, /* GPIOD */
    > + <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; /* GPIOE */
    > + };
    > +
    > dma: dma-controller@b0260000 {
    > compatible = "actions,s500-dma";
    > reg = <0xb0260000 0xd00>;
    > --
    > 2.29.2
    >

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