Messages in this thread |  | | Date | Fri, 27 Nov 2020 19:09:09 +0530 | From | Sai Prakash Ranjan <> | Subject | Re: [PATCH 3/3] soc: qcom: llcc-qcom: Add support for SM8250 SoC |
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Hi Mani,
On 2020-11-27 17:41, Manivannan Sadhasivam wrote: > SM8250 SoC uses LLCC IP version 2. In this version, the WRSC_EN > register > needs to be written to enable the Write Sub Cache for each SCID. Hence, > use a dedicated "write_scid_en" member with predefined values and write > them for SoCs enabling the "llcc_v2" flag. > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > --- > drivers/soc/qcom/llcc-qcom.c | 40 ++++++++++++++++++++++++++++++ > include/linux/soc/qcom/llcc-qcom.h | 1 + > 2 files changed, 41 insertions(+) > > diff --git a/drivers/soc/qcom/llcc-qcom.c > b/drivers/soc/qcom/llcc-qcom.c > index 16b421608e9c..3ec4cdffa852 100644 > --- a/drivers/soc/qcom/llcc-qcom.c > +++ b/drivers/soc/qcom/llcc-qcom.c > @@ -47,6 +47,7 @@ > > #define LLCC_TRP_SCID_DIS_CAP_ALLOC 0x21f00 > #define LLCC_TRP_PCB_ACT 0x21f04 > +#define LLCC_TRP_WRSC_EN 0x21f20 > > #define BANK_OFFSET_STRIDE 0x80000 > > @@ -73,6 +74,7 @@ > * then the ways assigned to this client are not flushed > on power > * collapse. > * @activate_on_init: Activate the slice immediately after it is > programmed > + * @write_scid_en: Bit enables write cache support for a given scid. > */ > struct llcc_slice_config { > u32 usecase_id; > @@ -87,12 +89,14 @@ struct llcc_slice_config { > bool dis_cap_alloc; > bool retain_on_pc; > bool activate_on_init; > + bool write_scid_en; > }; > > struct qcom_llcc_config { > const struct llcc_slice_config *sct_data; > int size; > bool need_llcc_cfg; > + bool llcc_v2; > };
We can extract the version from HW info register and so would not have to maintain a flag for every new version of LLCC. I had a patch to do that which I have sent to you now, perhaps you can check if that works for you and take it with this series?
Thanks, Sai
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