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SubjectRe: [PATCH 3/4] arm64: dts: meson-axg: add PCIe nodes
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On 22/11/2020 23:14, Martin Blumenstingl wrote:
> Hi Neil,
>
> (I have to admit that for me the PCI(e) bindings are very complex, so
> I may be mixing up things. I am still sending this review mail because
> "you're doing it different than in meson-g12-common.dtsi")
>
> On Fri, Nov 20, 2020 at 4:33 PM Neil Armstrong <narmstrong@baylibre.com> wrote:
> [...]
>> + pcieA: pcie@f9800000 {
>> + compatible = "amlogic,axg-pcie", "snps,dw-pcie";
>> + reg = <0x0 0xf9800000 0x0 0x400000>,
>> + <0x0 0xff646000 0x0 0x2000>,
>> + <0x0 0xf9f00000 0x0 0x100000>;
>> + reg-names = "elbi", "cfg", "config";
>> + interrupts = <GIC_SPI 177 IRQ_TYPE_EDGE_RISING>;
>> + #interrupt-cells = <1>;
>> + interrupt-map-mask = <0 0 0 0>;
>> + interrupt-map = <0 0 0 0 &gic GIC_SPI 179 IRQ_TYPE_EDGE_RISING>;
>> + bus-range = <0x0 0xff>;
>> + #address-cells = <3>;
>> + #size-cells = <2>;
>> + device_type = "pci";
>> + ranges = <0x82000000 0 0xf9c00000 0x0 0xf9c00000 0 0x00300000>;
> only PCI IO space here, no PCI MEM space?


I know, I tried to add IO & MEM space like g12, but it doesn't work.


>
> [...]
>> + pcieB: pcie@fa000000 {
>> + compatible = "amlogic,axg-pcie", "snps,dw-pcie";
>> + reg = <0x0 0xfa000000 0x0 0x400000>,
>> + <0x0 0xff648000 0x0 0x2000>,
>> + <0x0 0xfa400000 0x0 0x100000>;
>> + reg-names = "elbi", "cfg", "config";
>> + interrupts = <GIC_SPI 167 IRQ_TYPE_EDGE_RISING>;
>> + #interrupt-cells = <1>;
>> + interrupt-map-mask = <0 0 0 0>;
>> + interrupt-map = <0 0 0 0 &gic GIC_SPI 169 IRQ_TYPE_EDGE_RISING>;
>> + bus-range = <0x0 0xff>;
>> + #address-cells = <3>;
>> + #size-cells = <2>;
>> + device_type = "pci";
>> + ranges = <0x82000000 0 0xfa500000 0x0 0xfa500000 0 0x00300000>;
> same as above: only PCI IO space here, no PCI MEM space?

Same,

I suspect they configured the two instance differently.
Anyway I managed to used an NVMe and a PCIe XHCI controller on each port successfully.

Since I'm a PCIe nOOb, I don't know...

Neil

>
>
> Best regards,
> Martin
>

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