Messages in this thread | | | Date | Tue, 24 Nov 2020 09:32:54 +0530 | From | Sai Prakash Ranjan <> | Subject | Re: [PATCHv8 0/8] System Cache support for GPU and required SMMU support |
| |
On 2020-11-24 00:52, Rob Clark wrote: > On Mon, Nov 23, 2020 at 9:01 AM Sai Prakash Ranjan > <saiprakash.ranjan@codeaurora.org> wrote: >> >> On 2020-11-23 20:51, Will Deacon wrote: >> > On Tue, Nov 17, 2020 at 08:00:39PM +0530, Sai Prakash Ranjan wrote: >> >> Some hardware variants contain a system cache or the last level >> >> cache(llc). This cache is typically a large block which is shared >> >> by multiple clients on the SOC. GPU uses the system cache to cache >> >> both the GPU data buffers(like textures) as well the SMMU pagetables. >> >> This helps with improved render performance as well as lower power >> >> consumption by reducing the bus traffic to the system memory. >> >> >> >> The system cache architecture allows the cache to be split into slices >> >> which then be used by multiple SOC clients. This patch series is an >> >> effort to enable and use two of those slices preallocated for the GPU, >> >> one for the GPU data buffers and another for the GPU SMMU hardware >> >> pagetables. >> >> >> >> Patch 1 - Patch 6 adds system cache support in SMMU and GPU driver. >> >> Patch 7 and 8 are minor cleanups for arm-smmu impl. >> >> >> >> Changes in v8: >> >> * Introduce a generic domain attribute for pagetable config (Will) >> >> * Rename quirk to more generic IO_PGTABLE_QUIRK_ARM_OUTER_WBWA (Will) >> >> * Move non-strict mode to use new struct domain_attr_io_pgtbl_config >> >> (Will) >> > >> > Modulo some minor comments I've made, this looks good to me. What is >> > the >> > plan for merging it? I can take the IOMMU parts, but patches 4-6 touch >> > the >> > MSM GPU driver and I'd like to avoid conflicts with that. >> > >> >> SMMU bits are pretty much independent and GPU relies on the domain >> attribute >> and the quirk exposed, so as long as SMMU changes go in first it >> should >> be good. >> Rob? > > I suppose one option would be to split out the patch that adds the > attribute into it's own patch, and merge that both thru drm and iommu? >
Ok I can split out domain attr and quirk into its own patch if Will is fine with that approach.
> If Will/Robin dislike that approach, I'll pick up the parts of the drm > patches which don't depend on the new attribute for v5.11 and the rest > for v5.12.. or possibly a second late v5.11 pull req if airlied > doesn't hate me too much for it. > > Going forward, I think we will have one or two more co-dependent > series, like the smmu iova fault handler improvements that Jordan > posted. So I would like to hear how Will and Robin prefer to handle > those. > > BR, > -R >
Thanks, Sai
-- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
| |