Messages in this thread | | | From | Sergio Paracuellos <> | Date | Thu, 19 Nov 2020 10:35:38 +0100 | Subject | Re: [PATCH v3 3/5] clk: ralink: add clock driver for mt7621 SoC |
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Hi,
On Thu, Nov 19, 2020 at 10:32 AM Chuanhong Guo <gch981213@gmail.com> wrote: > > Hi! > > On Fri, Nov 13, 2020 at 11:46 PM Sergio Paracuellos > <sergio.paracuellos@gmail.com> wrote: > > [...] > > diff --git a/drivers/clk/ralink/Makefile b/drivers/clk/ralink/Makefile > > new file mode 100644 > > index 000000000000..cf6f9216379d > > --- /dev/null > > +++ b/drivers/clk/ralink/Makefile > > Why ralink? The clock design of mt7621 doesn't seem > to be part of ralink legacy stuff, and ralink is already > acquired by mediatek anyway. > I think it should be put in drivers/clk/mediatek instead.
I don't really know. It seems in that directory only arm arch related code from mediatek is included... but let's see what other people think about this.
> > -- > Regards, > Chuanhong Guo
Best regards, Sergio Paracuellos
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