Messages in this thread | | | Date | Tue, 17 Nov 2020 22:57:17 +0000 | From | Will Deacon <> | Subject | Re: [PATCH] iommu/amd: Enforce 4k mapping for certain IOMMU data structures |
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On Wed, Oct 28, 2020 at 11:18:24PM +0000, Suravee Suthikulpanit wrote: > AMD IOMMU requires 4k-aligned pages for the event log, the PPR log, > and the completion wait write-back regions. However, when allocating > the pages, they could be part of large mapping (e.g. 2M) page. > This causes #PF due to the SNP RMP hardware enforces the check based > on the page level for these data structures.
Please could you include an example backtrace here?
> So, fix by calling set_memory_4k() on the allocated pages.
I think I'm missing something here. set_memory_4k() will break the kernel linear mapping up into page granular mappings, but the IOMMU isn't using that mapping, right? It's just using the physical address returned by iommu_virt_to_phys(), so why does it matter?
Just be nice to capture some of this rationale in the log, especially as I'm not familiar with this device.
> Fixes: commit c69d89aff393 ("iommu/amd: Use 4K page for completion wait write-back semaphore")
I couldn't figure out how that commit could cause this problem. Please can you explain that to me?
Cheers,
Will
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