Messages in this thread | | | Date | Mon, 16 Nov 2020 18:33:46 +0100 | From | Christoph Hellwig <> | Subject | Re: [RESEND PATCH v2 4/5] drm/msm: add DRM_MSM_GEM_SYNC_CACHE for non-coherent cache maintenance |
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On Sat, Nov 14, 2020 at 03:07:20PM -0500, Jonathan Marek wrote: > qcom's vulkan driver has nonCoherentAtomSize=1, and it looks like > dma_sync_single_for_cpu() does deal in some way with the partial cache line > case, although I'm not sure that means we can have a nonCoherentAtomSize=1.
No, it doesn't. You need to ensure ownership is managed at dma_get_cache_alignment() granularity.
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