Messages in this thread Patch in this message | | | Date | Wed, 11 Nov 2020 13:36:24 -0000 | From | "tip-bot2 for Thomas Gleixner" <> | Subject | [tip: x86/fpu] x86/fpu: Simplify fpregs_[un]lock() |
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The following commit has been merged into the x86/fpu branch of tip:
Commit-ID: 5f0c71278d6848b4809f83af90f28196e1505ab1 Gitweb: https://git.kernel.org/tip/5f0c71278d6848b4809f83af90f28196e1505ab1 Author: Thomas Gleixner <tglx@linutronix.de> AuthorDate: Tue, 27 Oct 2020 11:09:50 +01:00 Committer: Thomas Gleixner <tglx@linutronix.de> CommitterDate: Wed, 11 Nov 2020 14:35:16 +01:00
x86/fpu: Simplify fpregs_[un]lock()
There is no point in disabling preemption and then disabling bottom halfs.
Just disabling bottom halfs is sufficient as it implicitly disables preemption on !RT kernels.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/20201027101349.455380473@linutronix.de
--- arch/x86/include/asm/fpu/api.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/x86/include/asm/fpu/api.h b/arch/x86/include/asm/fpu/api.h index dcd9503..2c5bef7 100644 --- a/arch/x86/include/asm/fpu/api.h +++ b/arch/x86/include/asm/fpu/api.h @@ -29,17 +29,18 @@ extern void fpregs_mark_activate(void); * A context switch will (and softirq might) save CPU's FPU registers to * fpu->state and set TIF_NEED_FPU_LOAD leaving CPU's FPU registers in * a random state. + * + * local_bh_disable() protects against both preemption and soft interrupts + * on !RT kernels. */ static inline void fpregs_lock(void) { - preempt_disable(); local_bh_disable(); } static inline void fpregs_unlock(void) { local_bh_enable(); - preempt_enable(); } #ifdef CONFIG_X86_DEBUG_FPU
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