Messages in this thread | | | From | Zong Li <> | Subject | [PATCH v4 0/4] clk: add driver for the SiFive FU740 | Date | Wed, 11 Nov 2020 18:06:04 +0800 |
| |
Add a driver for the SiFive FU740 PRCI IP block, which handles more clocks than FU540. These patches also refactor the original implementation by spliting the dependent-code of fu540 and fu740 respectively. In v3 and v4 patch set, it fix the wrong clk enable bit field which reported by Pragnesh.
Changed in v4: - Fix the wrong enable bit field shift for FU540 and FU740.
Changed in v3: - Fix the wrong enable bit field shift for FU740.
Changed in v2: - Remove the macro definition for __prci_clock_array. - Indicate the functional changes in commit message. - Using option -M and -C to create patches. - Rebase code to kernel v5.10-rc3.
Zong Li (4): clk: sifive: Extract prci core to common base clk: sifive: Use common name for prci configuration clk: sifive: Add a driver for the SiFive FU740 PRCI IP block clk: sifive: Fix the wrong bit field shift
arch/riscv/Kconfig.socs | 2 +- drivers/clk/sifive/Kconfig | 8 +- drivers/clk/sifive/Makefile | 5 +- drivers/clk/sifive/fu540-prci.c | 586 +----------------- drivers/clk/sifive/fu540-prci.h | 21 + drivers/clk/sifive/fu740-prci.c | 122 ++++ drivers/clk/sifive/fu740-prci.h | 21 + .../sifive/{fu540-prci.c => sifive-prci.c} | 499 ++++++--------- drivers/clk/sifive/sifive-prci.h | 289 +++++++++ include/dt-bindings/clock/sifive-fu740-prci.h | 23 + 10 files changed, 703 insertions(+), 873 deletions(-) create mode 100644 drivers/clk/sifive/fu540-prci.h create mode 100644 drivers/clk/sifive/fu740-prci.c create mode 100644 drivers/clk/sifive/fu740-prci.h copy drivers/clk/sifive/{fu540-prci.c => sifive-prci.c} (45%) create mode 100644 drivers/clk/sifive/sifive-prci.h create mode 100644 include/dt-bindings/clock/sifive-fu740-prci.h
-- 2.29.2
| |