Messages in this thread | | | From | Pragnesh Patel <> | Subject | RE: [PATCH v3 3/3] clk: sifive: Add a driver for the SiFive FU740 PRCI IP block | Date | Wed, 11 Nov 2020 09:56:49 +0000 |
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>-----Original Message----- >From: Zong Li <zong.li@sifive.com> >Sent: 11 November 2020 15:05 >To: Paul Walmsley ( Sifive) <paul.walmsley@sifive.com>; palmer@dabbelt.com; >sboyd@kernel.org; schwab@linux-m68k.org; Pragnesh Patel ><pragnesh.patel@openfive.com>; aou@eecs.berkeley.edu; >mturquette@baylibre.com; Yash Shah <yash.shah@openfive.com>; linux- >kernel@vger.kernel.org; linux-clk@vger.kernel.org; linux- >riscv@lists.infradead.org >Cc: Zong Li <zong.li@sifive.com>; Henry Styles ( Sifive) <hes@sifive.com>; Erik >Danie <erik.danie@sifive.com> >Subject: [PATCH v3 3/3] clk: sifive: Add a driver for the SiFive FU740 PRCI IP >block > >Add driver code for the SiFive FU740 PRCI IP block. This IP block handles reset >and clock control for the SiFive FU740 device and implements SoC-level clock >tree controls and dividers. > >This driver contains bug fixes and contributions from Henry Styles ><hes@sifive.com> Erik Danie <erik.danie@sifive.com> Pragnesh Patel ><pragnesh.patel@openfive.com> > >Signed-off-by: Zong Li <zong.li@sifive.com> >Cc: Henry Styles <hes@sifive.com> >Cc: Erik Danie <erik.danie@sifive.com> >Cc: Pragnesh Patel <pragnesh.patel@openfive.com> >--- > drivers/clk/sifive/Kconfig | 4 +- > drivers/clk/sifive/Makefile | 1 + > drivers/clk/sifive/fu740-prci.c | 122 ++++++++++++++++++ > drivers/clk/sifive/fu740-prci.h | 21 +++ > drivers/clk/sifive/sifive-prci.c | 120 +++++++++++++++++ > drivers/clk/sifive/sifive-prci.h | 88 +++++++++++++ > include/dt-bindings/clock/sifive-fu740-prci.h | 23 ++++ > 7 files changed, 377 insertions(+), 2 deletions(-) create mode 100644
Reviewed-by: Pragnesh Patel <Pragnesh.patel@sifive.com>
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