Messages in this thread | | | Subject | Re: [EXTERNAL] [tip: x86/apic] x86/io_apic: Cleanup trigger/polarity helpers | From | David Woodhouse <> | Date | Wed, 11 Nov 2020 21:19:24 +0000 |
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On Wed, 2020-11-11 at 14:30 -0600, Tom Lendacky wrote: > On 11/11/20 6:32 AM, David Woodhouse wrote: > > On Wed, 2020-11-11 at 10:36 +0000, David Woodhouse wrote: > > > On Wed, 2020-11-11 at 10:46 +0100, Thomas Gleixner wrote: > > > > Looking at it now with brain awake, the XTSUP stuff is pretty much > > > > the same as DMAR, which I didn't realize yesterday. The affinity > > > > notifier muck is not needed when we have a write_msg() function which > > > > twiddles the bits into those other locations. > > > > > > I kind of hate the fact that it's swizzling those bits through invalid > > > MSI messages, so I did it as its own irqdomain using > > > irq_domain_create_hierarchy() directly instead of > > > msi_create_irq_domain(). > > > > Please give this a spin: > > > > https://git.infradead.org/users/dwmw2/linux.git/shortlog/refs/heads/amdvi > > I had trouble cloning your tree for some reason, so just took the top > three patches and applied them to the tip tree. This all appears to be > working. I'll let the IOMMU experts take a closer look (adding Suravee).
Thanks. Exercising it by actually triggering faults and observing the IOMMU interrupt really working would be quite useful — on hardware with both INTCAPXT and the older MSI delivery. [unhandled content-type:application/x-pkcs7-signature] | |