Messages in this thread | | | From | David Laight <> | Subject | RE: [PATCH 0/2] arm64: Allow the rescheduling IPI to bypass irq_enter/exit | Date | Sun, 1 Nov 2020 14:30:29 +0000 |
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From: Marc Zyngier > Sent: 01 November 2020 13:14 > > Vincent recently reported [1] that 5.10-rc1 showed a significant > regression when running "perf bench sched pipe" on arm64, and > pinpointed it to the recent move to handling IPIs as normal > interrupts. > > The culprit is the use of irq_enter/irq_exit around the handling of > the rescheduling IPI, meaning that we enter the scheduler right after > the handling of the IPI instead of deferring it to the next preemption > event. This accounts for most of the overhead introduced. > > On architectures that have architected IPIs at the CPU level (x86 > being the obvious one), the absence of irq_enter/exit is natural. ARM > (both 32 and 64bits) mimicked this behaviour by having some > arch-specific handling for the interrupts that are used to implement > IPIs. Moving IPIs on the normal interrupt path introduced the > regression. > > This couple of patches try to acknowledge the fact that some IPIs are > "special", in the sense that they don't need to follow the standard > interrupt handling flow. > > The good news is that it cures the regression on arm64, and could > be similarly beneficial to both 32bit ARM, MIPS, or any other > architecture that uses a unique IRQ to represent the scheduler IPI. > > The bad news is that these patches are ugly as sin, and I really don't > like them. I specially hate that they can give driver authors the idea > that they can make random interrupts "faster". > > Comments, suggestions and hate mails appreciated, as always.
One problem is that the only explanation is in the cover note. Nothing in the patches even gives a hint as to what difference the 'NAKED' flag makes nor why its is applied to one interrupt.
Which all means someone might revert it all as part of a cleanup. A couple of comments is probably all it needs.
David
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