Messages in this thread | | | Subject | Re: [PATCH 0/2] PCI: dwc: Add support to handle prefetchable memory separately | From | Vidya Sagar <> | Date | Mon, 5 Oct 2020 17:49:27 +0530 |
| |
On 9/7/2020 10:40 PM, Lorenzo Pieralisi wrote: > External email: Use caution opening links or attachments > > > On Mon, Jul 06, 2020 at 10:05:06AM +0530, Vidya Sagar wrote: >> >> >> On 18-Jun-20 12:26 AM, Vidya Sagar wrote: >>> >>> >>> On 02-Jun-20 10:37 PM, Gustavo Pimentel wrote: >>>> External email: Use caution opening links or attachments >>>> >>>> >>>> On Tue, Jun 2, 2020 at 11:9:38, Vidya Sagar <vidyas@nvidia.com> wrote: >>>> >>>>> In this patch series, >>>>> Patch-1 >>>>> adds required infrastructure to deal with prefetchable memory region >>>>> information coming from 'ranges' property of the respective >>>>> device-tree node >>>>> separately from non-prefetchable memory region information. >>>>> Patch-2 >>>>> Adds support to use ATU region-3 for establishing the mapping >>>>> between CPU >>>>> addresses and PCIe bus addresses. >>>>> It also changes the logic to determine whether mapping is >>>>> required or not by >>>>> checking both CPU address and PCIe bus address for both prefetchable and >>>>> non-prefetchable regions. If the addresses are same, then, it is >>>>> understood >>>>> that 1:1 mapping is in place and there is no need to setup ATU mapping >>>>> whereas if the addresses are not the same, then, there is a need >>>>> to setup ATU >>>>> mapping. This is certainly true for Tegra194 and what I heard >>>>> from our HW >>>>> engineers is that it should generally be true for any DWC based >>>>> implementation >>>>> also. >>>>> Hence, I request Synopsys folks (Jingoo Han & Gustavo Pimentel >>>>> ??) to confirm >>>>> the same so that this particular patch won't cause any >>>>> regressions for other >>>>> DWC based platforms. >>>> >>>> Hi Vidya, >>>> >>>> Unfortunately due to the COVID-19 lockdown, I can't access my development >>>> prototype setup to test your patch. >>>> It might take some while until I get the possibility to get access to it >>>> again. >>> Hi Gustavo, >>> Did you find time to check this? >>> Adding Kishon and Alan as well to take a look at this and verify on >>> their platforms if possible. >> Hi Kishon and Alan, did you find time to verify this on your respective >> platforms? > > Yes please. I would like to merge this code, in preparation for that > to happen mind rebasing the series against my pci/dwc branch with > Rob's suggested changes implemented ? Hi, Apologies for the delay in reply. I was on leave and couldn't really look into it. I pushed a new patch on top of your pci/dwc branch at http://patchwork.ozlabs.org/project/linux-pci/patch/20201005121351.32516-1-vidyas@nvidia.com/
@Rob and @Lorenzo, please review it. Since I changed the subject, I pushed it as a new patch and not as V2 of the previous patch set. I hope this is fine.
Thanks, Vidya Sagar
> > Thanks a lot, > Lorenzo >
| |