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SubjectRe: [PATCH 1/5] arm64: dts: imx8mn: Enable Asynchronous Sample Rate Converter
On Mon, Oct 19, 2020 at 12:45:24PM -0500, Adam Ford wrote:
> The driver exists for the Enhanced Asynchronous Sample Rate Converter
> (EASRC) Controller, but there isn't a device tree entry for it.
>
> On the vendor kernel, they put this on a spba-bus for SDMA support.
>
> Add the the node for the spba-bus with the easrc node inside.
>
> Signed-off-by: Adam Ford <aford173@gmail.com>
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> index 746faf1cf2fb..7d34281332e1 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> @@ -246,6 +246,34 @@ aips1: bus@30000000 {
> #size-cells = <1>;
> ranges;
>
> + spba-bus@30000000 {

spba: bus@30000000

> + compatible = "fsl,spba-bus", "simple-bus";

"fsl,spba-bus" is undocumented. Document it or drop it.

> + #address-cells = <1>;
> + #size-cells = <1>;
> + reg = <0x30000000 0x100000>;
> + ranges;
> +
> + easrc: easrc@300C0000 {
> + compatible = "fsl,imx8mn-easrc";
> + reg = <0x300C0000 0x10000>;
> + interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MN_CLK_ASRC_ROOT>;
> + clock-names = "mem";
> + dmas = <&sdma2 16 23 0> , <&sdma2 17 23 0>,
> + <&sdma2 18 23 0> , <&sdma2 19 23 0>,
> + <&sdma2 20 23 0> , <&sdma2 21 23 0>,
> + <&sdma2 22 23 0> , <&sdma2 23 23 0>;
> + dma-names = "ctx0_rx", "ctx0_tx",
> + "ctx1_rx", "ctx1_tx",
> + "ctx2_rx", "ctx2_tx",
> + "ctx3_rx", "ctx3_tx";
> + fsl,easrc-ram-script-name = "imx/easrc/easrc-imx8mn.bin";

Undocumented property?

Shawn

> + fsl,asrc-rate = <8000>;
> + fsl,asrc-width = <16>;
> + status = "disabled";
> + };
> + };
> +
> gpio1: gpio@30200000 {
> compatible = "fsl,imx8mn-gpio", "fsl,imx35-gpio";
> reg = <0x30200000 0x10000>;
> --
> 2.25.1
>

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