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Subject[PATCH V2 1/1] nvme: Add quirk for LiteON CL1 devices running FW 220TQ,22001
LiteON(SSSTC) CL1 device running FW 220TQ,22001 has bugs with simple
suspend.

When NVMe device receive D3hot from host, NVMe firmware will do
garbage collection. While NVMe device do Garbage collection,
firmware has chance to going incorrect address.
In that case, NVMe storage device goes to no device available state.
Finally, host can't access the device any more.

Quirk devices will not use simple suspend even if HMB is enabled.
In case of poweroff scenario, NVMe receive "PME turn off".
So garbage collection will not be happening.

Liteon(SSSTC) will fix the issue, that's why quirk apply on specific
vendor id and firmware version on specific platform.

Signed-off-by: Jongpil Jung <jongpuls@gmail.com>
---
drivers/nvme/host/core.c | 42 ++++++++++++++++++++++++++++++++++++++--
drivers/nvme/host/nvme.h | 4 ++++
drivers/nvme/host/pci.c | 6 +++++-
3 files changed, 49 insertions(+), 3 deletions(-)

diff --git a/drivers/nvme/host/core.c b/drivers/nvme/host/core.c
index 95ef4943d8bd..b7b0b694ee21 100644
--- a/drivers/nvme/host/core.c
+++ b/drivers/nvme/host/core.c
@@ -2637,6 +2637,36 @@ static const struct nvme_core_quirk_entry core_quirks[] = {
.vid = 0x14a4,
.fr = "22301111",
.quirks = NVME_QUIRK_SIMPLE_SUSPEND,
+ },
+ {
+ /*
+ * This LiteON CL1-3D256 CR22001 firmware version has some
+ * issue in simple suspend.
+ * Simple Suspend issue will be fixed in future firmware
+ */
+ .vid = 0x14a4,
+ .fr = "CR22001",
+ .quirks = NVME_QUIRK_NORMAL_SUSPEND_HMB,
+ },
+ {
+ /*
+ * This LiteON CL1-3D256 CR220TQ firmware version has some
+ * issue in simple suspend.
+ * Simple Suspend issue will be fixed in future firmware
+ */
+ .vid = 0x14a4,
+ .fr = "CR220TQ",
+ .quirks = NVME_QUIRK_NORMAL_SUSPEND_HMB,
+ },
+ {
+ /*
+ * This SSSTC CL1-3D256 CR22001 firmware version has some
+ * issue in simple suspend.
+ * Simple Suspend issue will be fixed in future firmware
+ */
+ .vid = 0x1e95,
+ .fr = "CR22001",
+ .quirks = NVME_QUIRK_NORMAL_SUSPEND_HMB,
}
};

@@ -3007,10 +3037,18 @@ int nvme_init_identify(struct nvme_ctrl *ctrl)
* could re-scan for quirks every time we reinitialize
* the device, but we'd have to make sure that the driver
* behaves intelligently if the quirks change.
+ * For NVME_QUIRK_NORMAL_SUSPEND_HMB, need to check board
+ * as well.
*/
for (i = 0; i < ARRAY_SIZE(core_quirks); i++) {
- if (quirk_matches(id, &core_quirks[i]))
- ctrl->quirks |= core_quirks[i].quirks;
+ if (quirk_matches(id, &core_quirks[i])) {
+ if (core_quirks[i].quirks == NVME_QUIRK_NORMAL_SUSPEND_HMB) {
+ if (dmi_match(DMI_BOARD_VENDOR, "Google") &&
+ dmi_match(DMI_BOARD_NAME, "Kohaku"))
+ ctrl->quirks |= core_quirks[i].quirks;
+ } else
+ ctrl->quirks |= core_quirks[i].quirks;
+ }
}
}

diff --git a/drivers/nvme/host/nvme.h b/drivers/nvme/host/nvme.h
index cc111136a981..2fde019dad8e 100644
--- a/drivers/nvme/host/nvme.h
+++ b/drivers/nvme/host/nvme.h
@@ -144,6 +144,10 @@ enum nvme_quirks {
* NVMe 1.3 compliance.
*/
NVME_QUIRK_NO_NS_DESC_LIST = (1 << 15),
+ /*
+ * Force noraml suspend/resume path for HMB enabled devices.
+ */
+ NVME_QUIRK_NORMAL_SUSPEND_HMB = (1 << 16),
};

/*
diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c
index df8f3612107f..1b1221cfb257 100644
--- a/drivers/nvme/host/pci.c
+++ b/drivers/nvme/host/pci.c
@@ -3014,10 +3014,14 @@ static int nvme_suspend(struct device *dev)
* specification allows the device to access the host memory buffer in
* host DRAM from all power states, but hosts will fail access to DRAM
* during S3.
+ *
+ * If NVME_QUIRK_NORMAL_SUSPEND_HMB is enabled,
+ * do not use SIMPLE_SUSPEND for HMB device.
*/
if (pm_suspend_via_firmware() || !ctrl->npss ||
!pcie_aspm_enabled(pdev) ||
- ndev->nr_host_mem_descs ||
+ (ndev->nr_host_mem_descs &&
+ !(ndev->ctrl.quirks & NVME_QUIRK_NORMAL_SUSPEND_HMB)) ||
(ndev->ctrl.quirks & NVME_QUIRK_SIMPLE_SUSPEND))
return nvme_disable_prepare_reset(ndev, true);

--
2.25.1
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