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    Subject[PATCH 5.8 069/633] KVM: nVMX: Morph notification vector IRQ on nested VM-Enter to pending PI
    Date
    From: Sean Christopherson <sean.j.christopherson@intel.com>

    commit 25bb2cf97139f81e3bb8910d26016a529019528e upstream.

    On successful nested VM-Enter, check for pending interrupts and convert
    the highest priority interrupt to a pending posted interrupt if it
    matches L2's notification vector. If the vCPU receives a notification
    interrupt before nested VM-Enter (assuming L1 disables IRQs before doing
    VM-Enter), the pending interrupt (for L1) should be recognized and
    processed as a posted interrupt when interrupts become unblocked after
    VM-Enter to L2.

    This fixes a bug where L1/L2 will get stuck in an infinite loop if L1 is
    trying to inject an interrupt into L2 by setting the appropriate bit in
    L2's PIR and sending a self-IPI prior to VM-Enter (as opposed to KVM's
    method of manually moving the vector from PIR->vIRR/RVI). KVM will
    observe the IPI while the vCPU is in L1 context and so won't immediately
    morph it to a posted interrupt for L2. The pending interrupt will be
    seen by vmx_check_nested_events(), cause KVM to force an immediate exit
    after nested VM-Enter, and eventually be reflected to L1 as a VM-Exit.
    After handling the VM-Exit, L1 will see that L2 has a pending interrupt
    in PIR, send another IPI, and repeat until L2 is killed.

    Note, posted interrupts require virtual interrupt deliveriy, and virtual
    interrupt delivery requires exit-on-interrupt, ergo interrupts will be
    unconditionally unmasked on VM-Enter if posted interrupts are enabled.

    Fixes: 705699a13994 ("KVM: nVMX: Enable nested posted interrupt processing")
    Cc: stable@vger.kernel.org
    Cc: Liran Alon <liran.alon@oracle.com>
    Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
    Message-Id: <20200812175129.12172-1-sean.j.christopherson@intel.com>
    Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

    ---
    arch/x86/kvm/lapic.c | 7 +++++++
    arch/x86/kvm/lapic.h | 1 +
    arch/x86/kvm/vmx/nested.c | 8 ++++++++
    3 files changed, 16 insertions(+)

    --- a/arch/x86/kvm/lapic.c
    +++ b/arch/x86/kvm/lapic.c
    @@ -490,6 +490,12 @@ static inline void apic_clear_irr(int ve
    }
    }

    +void kvm_apic_clear_irr(struct kvm_vcpu *vcpu, int vec)
    +{
    + apic_clear_irr(vec, vcpu->arch.apic);
    +}
    +EXPORT_SYMBOL_GPL(kvm_apic_clear_irr);
    +
    static inline void apic_set_isr(int vec, struct kvm_lapic *apic)
    {
    struct kvm_vcpu *vcpu;
    @@ -2462,6 +2468,7 @@ int kvm_apic_has_interrupt(struct kvm_vc
    __apic_update_ppr(apic, &ppr);
    return apic_has_interrupt_for_ppr(apic, ppr);
    }
    +EXPORT_SYMBOL_GPL(kvm_apic_has_interrupt);

    int kvm_apic_accept_pic_intr(struct kvm_vcpu *vcpu)
    {
    --- a/arch/x86/kvm/lapic.h
    +++ b/arch/x86/kvm/lapic.h
    @@ -89,6 +89,7 @@ int kvm_lapic_reg_read(struct kvm_lapic
    bool kvm_apic_match_dest(struct kvm_vcpu *vcpu, struct kvm_lapic *source,
    int shorthand, unsigned int dest, int dest_mode);
    int kvm_apic_compare_prio(struct kvm_vcpu *vcpu1, struct kvm_vcpu *vcpu2);
    +void kvm_apic_clear_irr(struct kvm_vcpu *vcpu, int vec);
    bool __kvm_apic_update_irr(u32 *pir, void *regs, int *max_irr);
    bool kvm_apic_update_irr(struct kvm_vcpu *vcpu, u32 *pir, int *max_irr);
    void kvm_apic_update_ppr(struct kvm_vcpu *vcpu);
    --- a/arch/x86/kvm/vmx/nested.c
    +++ b/arch/x86/kvm/vmx/nested.c
    @@ -3480,6 +3480,14 @@ static int nested_vmx_run(struct kvm_vcp
    if (unlikely(status != NVMX_VMENTRY_SUCCESS))
    goto vmentry_failed;

    + /* Emulate processing of posted interrupts on VM-Enter. */
    + if (nested_cpu_has_posted_intr(vmcs12) &&
    + kvm_apic_has_interrupt(vcpu) == vmx->nested.posted_intr_nv) {
    + vmx->nested.pi_pending = true;
    + kvm_make_request(KVM_REQ_EVENT, vcpu);
    + kvm_apic_clear_irr(vcpu, vmx->nested.posted_intr_nv);
    + }
    +
    /* Hide L1D cache contents from the nested guest. */
    vmx->vcpu.arch.l1tf_flush_l1d = true;


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