Messages in this thread | | | Date | Mon, 26 Oct 2020 17:01:51 +0000 | From | Mark Rutland <> | Subject | Re: [PATCH 3/4] arm64: avoid -Woverride-init warning |
| |
On Mon, Oct 26, 2020 at 05:03:30PM +0100, Arnd Bergmann wrote: > From: Arnd Bergmann <arnd@arndb.de> > > The icache_policy_str[] definition causes a warning when extra > warning flags are enabled: > > arch/arm64/kernel/cpuinfo.c:38:26: warning: initialized field overwritten [-Woverride-init] > 38 | [ICACHE_POLICY_VIPT] = "VIPT", > | ^~~~~~ > arch/arm64/kernel/cpuinfo.c:38:26: note: (near initialization for 'icache_policy_str[2]') > arch/arm64/kernel/cpuinfo.c:39:26: warning: initialized field overwritten [-Woverride-init] > 39 | [ICACHE_POLICY_PIPT] = "PIPT", > | ^~~~~~ > arch/arm64/kernel/cpuinfo.c:39:26: note: (near initialization for 'icache_policy_str[3]') > arch/arm64/kernel/cpuinfo.c:40:27: warning: initialized field overwritten [-Woverride-init] > 40 | [ICACHE_POLICY_VPIPT] = "VPIPT", > | ^~~~~~~ > arch/arm64/kernel/cpuinfo.c:40:27: note: (near initialization for 'icache_policy_str[0]') > > There is no real need for the default initializer here, as printing a > NULL string is harmless. Rewrite the logic to have an explicit > reserved value for the only one that uses the default value. > > This partially reverts the commit that removed ICACHE_POLICY_AIVIVT. > > Fixes: 155433cb365e ("arm64: cache: Remove support for ASID-tagged VIVT I-caches") > Signed-off-by: Arnd Bergmann <arnd@arndb.de>
> --- > arch/arm64/include/asm/cache.h | 1 + > arch/arm64/kernel/cpuinfo.c | 5 +++-- > 2 files changed, 4 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/include/asm/cache.h b/arch/arm64/include/asm/cache.h > index a4d1b5f771f6..16e1e16e7e61 100644 > --- a/arch/arm64/include/asm/cache.h > +++ b/arch/arm64/include/asm/cache.h > @@ -24,6 +24,7 @@ > #define CTR_L1IP(ctr) (((ctr) >> CTR_L1IP_SHIFT) & CTR_L1IP_MASK) > > #define ICACHE_POLICY_VPIPT 0 > +#define ICACHE_POLICY_RESERVED 1 > #define ICACHE_POLICY_VIPT 2 > #define ICACHE_POLICY_PIPT 3 > > diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c > index 6a7bb3729d60..b63269c7fcdb 100644 > --- a/arch/arm64/kernel/cpuinfo.c > +++ b/arch/arm64/kernel/cpuinfo.c > @@ -34,10 +34,10 @@ DEFINE_PER_CPU(struct cpuinfo_arm64, cpu_data); > static struct cpuinfo_arm64 boot_cpu_data; > > static const char *icache_policy_str[] = { > - [0 ... ICACHE_POLICY_PIPT] = "RESERVED/UNKNOWN", > + [ICACHE_POLICY_VPIPT] = "VPIPT", > + [ICACHE_POLICY_RESERVED] = "RESERVED/UNKNOWN", > [ICACHE_POLICY_VIPT] = "VIPT", > [ICACHE_POLICY_PIPT] = "PIPT", > - [ICACHE_POLICY_VPIPT] = "VPIPT", > };
Given it's not clear that ICACHE_POLICY_PIPT is the max value, I agree this is a bit cleaner. I don't have a nicer way of making this clearer.
[...]
> @@ -335,6 +335,7 @@ static void cpuinfo_detect_icache_policy(struct cpuinfo_arm64 *info) > set_bit(ICACHEF_VPIPT, &__icache_flags); > break; > default: > + case ICACHE_POLICY_RESERVED: > case ICACHE_POLICY_VIPT: > /* Assume aliasing */ > set_bit(ICACHEF_ALIASING, &__icache_flags); > ... but it's a bit weird to have both the default and ICACHE_POLICY_RESERVED cases. If we get rid of the default case, does any compiler warn? I suspect the masking in CTR_L1IP() might be sufficient to let the compiler see we've handled all cases.
Thanks, Mark.
| |