Messages in this thread | | | Subject | Re: [PATCH] x86/msr: do not warn on writes to OC_MAILBOX | From | Srinivas Pandruvada <> | Date | Wed, 21 Oct 2020 06:11:09 -0700 |
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On Tue, 2020-10-20 at 12:40 -0700, Dave Hansen wrote: > On 10/20/20 11:40 AM, Srinivas Pandruvada wrote: > > On Tue, 2020-10-20 at 19:47 +0200, Borislav Petkov wrote: > > > On Tue, Oct 20, 2020 at 10:21:48AM -0700, Srinivas Pandruvada > > > wrote: > > > > These command id are model specific. There is no guarantee that > > > > even > > > > meaning changes. So I don't think we should write any code in > > > > kernel > > > > which can't stick. > > > Ok, is there a common *set* of values present on all models > > Sorry, don't know. > > So, the question is: Is Intel willing to document this on a > sufficient > number of models that folks can make a sane driver out of it? > > Srinivas, that seems like a pretty sane thing for the community to > ask. > We've got random folks poking at MSRs and we don't know whether > they're > nuts or not and whether we should spew warnings of disdain. Seems > like > it would be in Intel's best interests to understand what users are > doing > with this MSR and to try to make sure they're not doing stuff which > is > too nutty, or at least give them the chance of avoiding warnings if > they're being nice. We are all for it. We have added several sysfs interfaces and adding more.
> > Sounds like Borislav is willing to help give Intel's customers a > nicer > interface. Mostly we from Intel would have to go dig out the docs > for > as many models as we can, and make sure we're allowed to talk about > it > publicly. > That is the problem. There is no public document.
> I dunno. Maybe we should try it for *one* model and see how it goes. > Maybe start with the one we're already poking from inside the kernel.
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