Messages in this thread | | | From | Arvind Sankar <> | Date | Tue, 20 Oct 2020 10:16:02 -0400 | Subject | Re: [PATCH v5 04/17] x86/acrn: Introduce hypercall interfaces |
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On Tue, Oct 20, 2020 at 10:30:17AM +0800, Shuo A Liu wrote: > On Mon 19.Oct'20 at 22:08:51 -0400, Arvind Sankar wrote: > >On Tue, Oct 20, 2020 at 09:38:09AM +0800, Shuo A Liu wrote: > >> On Mon 19.Oct'20 at 18:15:15 -0400, Arvind Sankar wrote: > >> >On Mon, Oct 19, 2020 at 02:17:50PM +0800, shuo.a.liu@intel.com wrote: > >> >> From: Shuo Liu <shuo.a.liu@intel.com> > >> >> > >> >> The Service VM communicates with the hypervisor via conventional > >> >> hypercalls. VMCALL instruction is used to make the hypercalls. > >> >> > >> >> ACRN hypercall ABI: > >> >> * Hypercall number is in R8 register. > >> >> * Up to 2 parameters are in RDI and RSI registers. > >> >> * Return value is in RAX register. > >> >> > >> >> Introduce the ACRN hypercall interfaces. Because GCC doesn't support R8 > >> >> register as direct register constraints, use supported constraint as > >> >> input with a explicit MOV to R8 in beginning of asm. > >> >> > >> >> +static inline long acrn_hypercall0(unsigned long hcall_id) > >> >> +{ > >> >> + long result; > >> >> + > >> >> + asm volatile("movl %1, %%r8d\n\t" > >> >> + "vmcall\n\t" > >> >> + : "=a" (result) > >> >> + : "ir" (hcall_id) > >> > > >> >Is the hypercall id an unsigned long (64 bits) or an unsigned int (32 > >> >bits)? This will generate broken assembly if the "r" option is chosen, > >> >eg something like > >> > movl %rdi, %r8d > >> > >> Yes, it can be an unsigned long. So do MOV explicitly. > >> > >> asm volatile("movq %1, %%r8\n\t" > >> "vmcall\n\t" > >> : "=a" (result) > >> : "ir" (hcall_id) > >> > >> Thanks > > > >All the hypercall ID's defined seem to be only 32 bits though? > > Yes, they are. > The paramter is unsigned long, use movq to align it.
I don't understand what you mean by alignment here, but I was asking why hcall_id is unsigned long and not unsigned int (or u32) if you only need 32 bits?
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