Messages in this thread Patch in this message | | | From | Jacopo Mondi <> | Subject | [PATCH v2 3/6] arm64: dts: renesas: r8a779a0: Add CSI-2 nodes | Date | Fri, 16 Oct 2020 13:11:55 +0200 |
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Add CSI-2 nodes to R8A779A0 R-Car V3U SoC.
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> ---
v2: - Add empty 'ports' node to pass dtbs validation
--- arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 52 +++++++++++++++++++++++ 1 file changed, 52 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi index 6cf77ce9aa93..62ed6ce29cb0 100644 --- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi @@ -117,6 +117,58 @@ gic: interrupt-controller@f1000000 { power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; };
+ csi40: csi2@feaa0000 { + compatible = "renesas,r8a779a0-csi2"; + reg = <0 0xfeaa0000 0 0x10000>; + interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 331>; + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; + resets = <&cpg 331>; + status = "disabled"; + + ports { + }; + }; + + csi41: csi2@feab0000 { + compatible = "renesas,r8a779a0-csi2"; + reg = <0 0xfeab0000 0 0x10000>; + interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 400>; + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; + resets = <&cpg 400>; + status = "disabled"; + + ports { + }; + }; + + csi42: csi2@fed60000 { + compatible = "renesas,r8a779a0-csi2"; + reg = <0 0xfed60000 0 0x10000>; + interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 401>; + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; + resets = <&cpg 401>; + status = "disabled"; + + ports { + }; + }; + + csi43: csi2@fed70000 { + compatible = "renesas,r8a779a0-csi2"; + reg = <0 0xfed70000 0 0x10000>; + interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 402>; + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; + resets = <&cpg 402>; + status = "disabled"; + + ports { + }; + }; + prr: chipid@fff00044 { compatible = "renesas,prr"; reg = <0 0xfff00044 0 4>; -- 2.28.0
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