Messages in this thread | | | Subject | Re: [PATCH v3 7/8] arm64: mm: Set ZONE_DMA size based on early IORT scan | From | Hanjun Guo <> | Date | Fri, 16 Oct 2020 15:27:21 +0800 |
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Hi Ard,
On 2020/10/16 14:54, Ard Biesheuvel wrote: > On Fri, 16 Oct 2020 at 08:51, Hanjun Guo <guohanjun@huawei.com> wrote: >> >> On 2020/10/16 2:03, Catalin Marinas wrote: >>> On Thu, Oct 15, 2020 at 10:26:18PM +0800, Hanjun Guo wrote: >>>> On 2020/10/15 3:12, Nicolas Saenz Julienne wrote: >>>>> From: Ard Biesheuvel <ardb@kernel.org> >>>>> >>>>> We recently introduced a 1 GB sized ZONE_DMA to cater for platforms >>>>> incorporating masters that can address less than 32 bits of DMA, in >>>>> particular the Raspberry Pi 4, which has 4 or 8 GB of DRAM, but has >>>>> peripherals that can only address up to 1 GB (and its PCIe host >>>>> bridge can only access the bottom 3 GB) >>>>> >>>>> Instructing the DMA layer about these limitations is straight-forward, >>>>> even though we had to fix some issues regarding memory limits set in >>>>> the IORT for named components, and regarding the handling of ACPI _DMA >>>>> methods. However, the DMA layer also needs to be able to allocate >>>>> memory that is guaranteed to meet those DMA constraints, for bounce >>>>> buffering as well as allocating the backing for consistent mappings. >>>>> >>>>> This is why the 1 GB ZONE_DMA was introduced recently. Unfortunately, >>>>> it turns out the having a 1 GB ZONE_DMA as well as a ZONE_DMA32 causes >>>>> problems with kdump, and potentially in other places where allocations >>>>> cannot cross zone boundaries. Therefore, we should avoid having two >>>>> separate DMA zones when possible. >>>>> >>>>> So let's do an early scan of the IORT, and only create the ZONE_DMA >>>>> if we encounter any devices that need it. This puts the burden on >>>>> the firmware to describe such limitations in the IORT, which may be >>>>> redundant (and less precise) if _DMA methods are also being provided. >>>>> However, it should be noted that this situation is highly unusual for >>>>> arm64 ACPI machines. Also, the DMA subsystem still gives precedence to >>>>> the _DMA method if implemented, and so we will not lose the ability to >>>>> perform streaming DMA outside the ZONE_DMA if the _DMA method permits >>>>> it. >>>> >>>> Sorry, I'm still a little bit confused. With this patch, if we have >>>> a device which set the right _DMA method (DMA size >= 32), but with the >>>> wrong DMA size in IORT, we still have the ZONE_DMA created which >>>> is actually not needed? >>> >>> With the current kernel, we get a ZONE_DMA already with an arbitrary >>> size of 1GB that matches what RPi4 needs. We are trying to eliminate >>> such unnecessary ZONE_DMA based on some heuristics (well, something that >>> looks "better" than a OEM ID based quirk). Now, if we learn that IORT >>> for platforms in the field is that broken as to describe few bits-wide >>> DMA masks, we may have to go back to the OEM ID quirk. >> >> Some platforms using 0 as the memory size limit, for example D05 [0] and >> D06 [1], I think we need to go back to the OEM ID quirk. >> >> For D05/D06, there are multi interrupt controllers named as mbigen, >> mbigen is using the named component to describe the mappings with >> the ITS controller, and mbigen is using 0 as the memory size limit. >> >> Also since the memory size limit for PCI RC was introduced by later >> IORT revision, so firmware people may think it's fine to set that >> as 0 because the system works without it. >> > > Hello Hanjun, > > The patch only takes the address limit field into account if its value > 0.
Sorry I missed the if (*->memory_address_limit) check, thanks for the reminding.
> > Also, before commit 7fb89e1d44cb6aec ("ACPI/IORT: take _DMA methods > into account for named components"), the _DMA method was not taken > into account for named components at all, and only the IORT limit was > used, so I do not anticipate any problems with that.
Then this patch is fine to me.
Thanks Hanjun
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