Messages in this thread | | | Subject | Re: [PATCH RFC v4 06/13] perf vendor events arm64: Add hip09 SMMUv3 PMCG events | From | John Garry <> | Date | Thu, 15 Oct 2020 08:47:45 +0100 |
| |
On 14/10/2020 19:06, Robin Murphy wrote: >> >> + "EventCode": "0x8a", >> + "EventName": "smmuv3_pmcg.L1_TLB", >> + "BriefDescription": "SMMUv3 PMCG L1 TABLE transation", >> + "PublicDescription": "SMMUv3 PMCG L1 TABLE transation", > > Those typos are either missing "c"s or "l"s, but with SMMU it's never > clear which ;)
Ha, I think either could work in this case.
The actual electronic translation I got is "command received by the L1 TLB", so I'll stick with that until someone here wants to expand on that.
Cheers
| |