Messages in this thread | | | Subject | Re: [PATCH v2 5/5] media: mt9p031: Fix corrupted frame after restarting stream | From | Stefan Riedmüller <> | Date | Wed, 14 Oct 2020 09:14:53 +0200 |
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Hi Laurent,
On 05.10.20 15:08, Laurent Pinchart wrote: > Hi Stefan, > > On Mon, Oct 05, 2020 at 11:28:21AM +0200, Stefan Riedmüller wrote: >> On 02.10.20 02:05, Laurent Pinchart wrote: >>> On Wed, Sep 30, 2020 at 12:51:33PM +0200, Stefan Riedmueller wrote: >>>> From: Dirk Bender <d.bender@phytec.de> >>>> >>>> To prevent corrupted frames after starting and stopping the sensor it's >>> >>> s/it's/its/ >> >> thanks, I'll fix that. >> >>>> datasheet specifies a specific pause sequence to follow: >>>> >>>> Stopping: >>>> Set Pause_Restart Bit -> Set Restart Bit -> Set Chip_Enable Off >>>> >>>> Restarting: >>>> Set Chip_Enable On -> Clear Pause_Restart Bit >>>> >>>> The Restart Bit is cleared automatically and must not be cleared >>>> manually as this would cause undefined behavior. >>>> >>>> Signed-off-by: Dirk Bender <d.bender@phytec.de> >>>> Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de> >>>> --- >>>> No changes in v2 >>>> --- >>>> drivers/media/i2c/mt9p031.c | 25 +++++++++++++++++++++++++ >>>> 1 file changed, 25 insertions(+) >>>> >>>> diff --git a/drivers/media/i2c/mt9p031.c b/drivers/media/i2c/mt9p031.c >>>> index d10457361e6c..d59f66e3dcf3 100644 >>>> --- a/drivers/media/i2c/mt9p031.c >>>> +++ b/drivers/media/i2c/mt9p031.c >>>> @@ -80,6 +80,8 @@ >>>> #define MT9P031_PIXEL_CLOCK_SHIFT(n) ((n) << 8) >>>> #define MT9P031_PIXEL_CLOCK_DIVIDE(n) ((n) << 0) >>>> #define MT9P031_FRAME_RESTART 0x0b >>>> +#define MT9P031_FRAME_RESTART_SET (1 << 0) >>>> +#define MT9P031_FRAME_PAUSE_RESTART_SET (1 << 1) >>> >>> The fields are named Restart and Pause_Restart, I would drop _SET. Could >>> you also sort them from MSB to LSB as for the other registers ? Using >>> BIT() would be good too, although this could be done as an additional >>> patch to convert all the existing macros. >> >> I'll do that. Also I will rename the register to MT9P031_RESTART and the >> bits to MT9P031_FRAME_RESTART and MT9P031_FRAME_PAUSE_RESTART. >> >>>> #define MT9P031_SHUTTER_DELAY 0x0c >>>> #define MT9P031_RST 0x0d >>>> #define MT9P031_RST_ENABLE 1 >>>> @@ -483,9 +485,25 @@ static int mt9p031_set_params(struct mt9p031 *mt9p031) >>>> static int mt9p031_s_stream(struct v4l2_subdev *subdev, int enable) >>>> { >>>> struct mt9p031 *mt9p031 = to_mt9p031(subdev); >>>> + struct i2c_client *client = v4l2_get_subdevdata(subdev); >>>> + int val; >>>> int ret; >>>> >>>> if (!enable) { >>>> + val = mt9p031_read(client, MT9P031_FRAME_RESTART); >>> >>> Do you need to read the register ? Can't you write >>> MT9P031_FRAME_PAUSE_RESTART_SET and then MT9P031_FRAME_PAUSE_RESTART_SET >>> | MT9P031_FRAME_RESTART_SET ? And actually, can't we just write both >>> bits in one go, do we need two writes ? >> >> I think you're right we don't necessarily need to read the registers. The >> only other bit is not used by the driver. >> >> But I think we do need two separate writes, at least that is what the >> datasheet states. >> >> So I would drop the read but keep both write, ok? > > That's fine with me if required, although I don't see where this is > indicated in the datasheet, but I may have missed it.
It's in "Standby and Chip Enable". There is a Sequence for entering soft standby with two separate writes:
REG = 0x0B, 0x0002 REG = 0x0B, 0x0003
Regards, Stefan
> >>>> + >>>> + /* enable pause restart */ >>>> + val |= MT9P031_FRAME_PAUSE_RESTART_SET; >>>> + ret = mt9p031_write(client, MT9P031_FRAME_RESTART, val); >>>> + if (ret < 0) >>>> + return ret; >>>> + >>>> + /* enable restart + keep pause restart set */ >>>> + val |= MT9P031_FRAME_RESTART_SET; >>>> + ret = mt9p031_write(client, MT9P031_FRAME_RESTART, val); >>>> + if (ret < 0) >>>> + return ret; >>>> + >>>> /* Stop sensor readout */ >>>> ret = mt9p031_set_output_control(mt9p031, >>>> MT9P031_OUTPUT_CONTROL_CEN, 0); >>>> @@ -505,6 +523,13 @@ static int mt9p031_s_stream(struct v4l2_subdev *subdev, int enable) >>>> if (ret < 0) >>>> return ret; >>>> >>>> + val = mt9p031_read(client, MT9P031_FRAME_RESTART); >>>> + /* disable reset + pause restart */ >>>> + val &= ~MT9P031_FRAME_PAUSE_RESTART_SET; >>> >>> Same here, I think you can simply write MT9P031_FRAME_PAUSE_RESTART_SET. >> >> I'll drop the read here as well. But I need to make sure, that the Restart >> Bit is not cleared manually here. >> >>>> + ret = mt9p031_write(client, MT9P031_FRAME_RESTART, val); >>>> + if (ret < 0) >>>> + return ret; >>>> + >>>> return mt9p031_pll_enable(mt9p031); >>>> } >>>> >
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