Messages in this thread Patch in this message | | | From | Roger Quadros <> | Subject | [PATCH 5/5] arm64: dts: k3-j721e-proc-board: Add wait time for sampling Type-C DIR line | Date | Wed, 8 Jan 2020 13:18:30 +0200 |
| |
The Type-C compainon chip on the board needs ~133ms (tCCB_DEFAULT) to debounce the CC lines in order to detect attach and plug orientation and reflect the correct DIR status. [1]
Let's wait for 300ms before sampling the Type-C DIR line.
[1] http://www.ti.com/lit/ds/symlink/tusb321.pdf
Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> --- arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts | 1 + 1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts index 4d180887342c..1dc6fdc86bc5 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts @@ -272,6 +272,7 @@ &serdes_wiz3 { typec-dir-gpios = <&main_gpio1 3 GPIO_ACTIVE_HIGH>; + typec-dir-debounce-ms = <300>; /* TUSB321, tCCB_DEFAULT 133 ms */ }; &serdes3 { -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
| |