Messages in this thread | | | From | Avri Altman <> | Subject | RE: [PATCH RESEND v3 4/4] scsi: ufs-mediatek: gate ref-clk during Auto-Hibern8 | Date | Fri, 31 Jan 2020 18:48:19 +0000 |
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> > +static u32 ufs_mtk_link_get_state(struct ufs_hba *hba) > +{ > + u32 val; > + > + ufshcd_writel(hba, 0x20, REG_UFS_DEBUG_SEL); > + val = ufshcd_readl(hba, REG_UFS_PROBE); > + val = val >> 28; > + > + return val; > +} A little bit strange that you are relying on debug registers to setup your ref-clock. Is this this debug info is always available?
Thanks, Avri
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